68HC705BD7 datasheet(39/85 Pages) FREESCALE

номер детали	68HC705BD7

подробное описание детали	SPECIFICATION REV 2.0 (General Release)

PDF	85 Pages

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производитель	FREESCALE [Freescale Semiconductor, Inc]

домашняя страница	http://www.freescale.com

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SECTION 6: OPERATING MODES

Page 29

MC68HC05BD7 Rev. 2.0

GENERAL RELEASE SPECIFICATION

SECTION 6

OPERATING MODES

The HC05BD7/HC05BD2 has the following operating modes: single-chip mode (SCM) and

self-check mode.

The HC705BD7 has the following operating modes: User mode and bootstrap mode.

6.1

User Mode

In this mode, all address and data bus activity occurs within the MCU so no external pins

are required for these functions.

6.2

SELF-CHECK MODE

In this mode, the reset vector is fetched from the 240-byte internal self-check ROM at

$3F00:$3FEF. The self-check ROM contains a self-check program to test the functions of

internal modules.

6.3

Bootstrap Mode

In this mode, the reset vector is fetched from the 480-byte internal bootstrap ROM at

$0E00:$0FDF. The bootstrap ROM contains a small program which reads a program into

internal RAM and then passes control to execute EPROM programming.

6.4

Mode Entry

The mode entry is done at the rising edge of the RESET pin. Once the device enters one

of the operating modes, the mode can only be changed by an external reset.

At the rising edge of the RESET pin, the device latches the states of IRQ and PB5 pins and

places itself in the specified mode. While the RESET pin is low, all pins are configured as

Single Chip Mode. The following table shows the states of IRQ and PB5 pins for each mode

entry.

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68HC705BD7 датащи(PDF) 39 Page - Freescale Semiconductor, Inc