CAT660EVA datasheet(3/15 Pages) ONSEMI

3 / 15 page

CAT660

http://onsemi.com

Table 2. ABSOLUTE MAXIMUM RATINGS

Parameters

Ratings

Units

V+ to GND

Input Voltage (Pins 1, 6 and 7)

−0.3 to (V+ + 0.3)

BOOST/FC and OSC Input Voltage

The least negative of (Out − 0.3 V) or

(V+ − 6 V) to (V+ + 0.3 V)

Output Short−circuit Duration to GND

(OUT may be shorted to GND for 1 sec without damage but shorting OUT

to V+ should be avoided.)

sec.

Continuous Power Dissipation (TA = 70°C)

Plastic DIP

SOIC

TDFN

730

500

Storage Temperature

−65 to +160

°C

Lead Soldering Temperature (10 sec)

300

°C

Operating Ambient Temperature Range

−40 to +85

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

NOTE: TA = Ambient Temperature

Table 3. ELECTRICAL CHARACTERISTICS (V+ = 5 V, C1 = C2 = 150 mF, Boost/FC = Open, COSC = 0 pF, inverter mode with test

circuit as shown in Figure 3 unless otherwise noted. Temperature is over operating ambient temperature range unless otherwise noted.)

Parameter

Symbol

Conditions

Min

Typ

Max

Units

Supply Voltage

Inverter: LV = Open, RL = 1 kW

3.0

5.5

Inverter: LV = GND, RL = 1 kW

1.5

5.5

Doubler: LV = OUT, RL = 1 kW

2.5

5.5

Supply Current

BOOST/FC = open, LV = Open

0.09

0.5

BOOST/FC = V+, LV = Open

0.3

Output Current

IOUT

OUT is more negative than −4 V

100

Output Resistance

IL = 100 mA, C1 = C2 = 150 mF (Note 2)

BOOST/FC = V+ (C1, C2 ESR ≤ 0.5 W)

IL = 100 mA, C1 = C2 = 10 mF

Oscillator Frequency

(Note 3)

FOSC

BOOST/FC = Open

kHz

BOOST/FC = V+

OSC Input

Current

IOSC

BOOST/FC = Open

BOOST/FC = V+

±1

±5

Power Efficiency

RL = 1 kW connected between V+ and OUT,

TA = 25°C (Doubler)

RL = 500 W connected between GND and OUT,

TA = 25°C (Inverter)

IL = 100 mA to GND, TA = 25°C (Inverter)

Voltage Conversion

Efficiency

VEFF

No load, TA = 25°C

99.9

1. In Figure 3, test circuit capacitors C1 and C2 are 150 mF and have 0.2 W maximum ESR. Higher ESR levels may reduce efficiency and output

voltage.

2. The output resistance is a combination of the internal switch resistance and the external capacitor ESR. For maximum voltage and efficiency

keep external capacitor ESR under 0.2 W.

3. FOSC is tested with COSC = 100 pF to minimize test fixture loading. The test is correlated back to COSC = 0 pF to simulate the capacitance

at OSC when the device is inserted into a test socket without an external COSC.

CAT660EVA датащи(PDF) 3 Page - ON Semiconductor

CAT660EVA датащи(HTML) 3 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

датащи скачать

ссылки URL