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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DSP56303 датащи(PDF) 1 Page - Freescale Semiconductor, Inc |
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DSP56303 датащи(HTML) 1 Page - Freescale Semiconductor, Inc |
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1 / 108 page  Freescale Semiconductor Technical Data DSP56303 Rev. 11, 2/2005 © Freescale Semiconductor, Inc., 1996, 2005. All rights reserved. DSP56303 24-Bit Digital Signal Processor The DSP56303 is a member of the DSP56300 core family of programmable CMOS DSPs. Significant architectural features of the DSP56300 core family include a barrel shifter, 24-bit addressing, instruction cache, and DMA. The DSP56303 offers 100 MMACS using an internal 100 MHz clock at 3.0–3.6 volts. The DSP56300 core family offers a rich instruction set and low power dissipation, as well as increasing levels of speed and power to enable wireless, telecommunications, and multimedia products. Figure 1. DSP56303 Block Diagram PLL OnCE™ Clock Generator Internal Data Bus Switch YAB XAB PAB YDB XDB PDB GDB MODB/IRQB MODC/IRQC External Data Bus Switch 13 MODD/IRQD DSP56300 6 16 24-Bit 24 18 DDB DAB Peripheral Core Expansion Area 6 JTAG 5 3 RESET MODA/IRQA PINIT/NMI 2 Bootstrap ROM EXTAL XTAL Address Control Data Address Generation Unit Six-Channel DMA Unit Program Interrupt Controller Program Decode Controller Program Address Generator Data ALU 24 × 24 + 56 →56-bit MAC Two 56-bit Accumulators 56-bit Barrel Shifter Power Management External Bus Interface and Inst. Cache Control External Address Bus Switch Memory Expansion Area DE X Data RAM 2048 × 24 bits (default) Y Data RAM 2048 × 24 bits (default) Triple Timer HI08 ESSI SCI PrograM 4096 × 24 bits (default) RAM The DSP56303 is intended for use in telecommunication applications, such as multi- line voice/data/ fax processing, video conferencing, audio applications, control, and general digital signal processing. What’s New? Rev. 11 includes the following changes: • Adds lead-free packaging and part numbers. |
Аналогичный номер детали - DSP56303 |
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Аналогичное описание - DSP56303 |
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