DSP56F801 datasheet(13/48 Pages) FREESCALE

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Serial Communications Interface (SCI) Signals

56F801 Technical Data, Rev. 17

Freescale Semiconductor

2.7 Serial Communications Interface (SCI) Signals

2.8 Analog-to-Digital Converter (ADC) Signals

2.9 Quad Timer Module Signals

Table 2-9 Serial Communications Interface (SCI0) Signals

No. of

Pins

Signal

Name

Signal

Type

State During

Reset

Signal Description

TXD0

GPIOB0

Output

Input/Output

Input

Transmit Data (TXD0)—SCI0 transmit data output

Port B GPIO—This pin is a General Purpose I/O (GPIO) pin that

can be individually programmed as an input or output pin.

After reset, the default state is SCI output.

RXD0

GPIOB1

Input

Input/Output

Input

Receive Data (RXD0)—SCI0 receive data input

Port B GPIO—This pin is a General Purpose I/O (GPIO) pin that

can be individually programmed as an input or output pin.

After reset, the default state is SCI input.

Table 2-10 Analog to Digital Converter Signals

No. of

Pins

Signal

Name

Signal

Type

State During

Reset

Signal Description

ANA0-3

Input

ANA0-3—Analog inputs to ADC, channel 1

ANA4-7

Input

ANA4-7—Analog inputs to ADC, channel 2

VREF

Input

VREF—Analog reference voltage for ADC. Must be set to

VDDA-0.3V for optimal performance.

Table 2-11 Quad Timer Module Signals

No. of

Pins

Signal

Name

Signal Type

State During

Reset

Signal Description

TD0-2

GPIOA0-2

Input/Output

Input

TD0-2—Timer D Channel 0-2

Port A GPIO—This pin is a General Purpose I/O (GPIO) pin that

can be individually programmed as an input or output pin.

After reset, the default state is the quad timer input.

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