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LTC3589 датащи(PDF) 13 Page - Linear Technology |
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LTC3589 датащи(HTML) 13 Page - Linear Technology |
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13 / 44 page ![]() LTC3589 13 3589p PIN FUNCTIONS PBSTAT (Pin 22): Pushbutton Status. Open drain output to be used for processor interrupts. PBSTAT mirrors the status of ON pushbutton pin. PBSTAT is delayed 50ms from ON pin for debounce. WAKE (Pin 23): System Wake Up. Open drain driver output releases high when signaled by pushbutton activation or PWR_ON input. It may be used to initiate a pin-strapped power-up sequence by connecting to a regulator enable pin to initiate a pin strapped power-on sequence. PVIN2 (Pin 24): Power Input for Step-Down Switching Regulator 2. This pin should be bypassed to ground with a 4.7μF or greater ceramic capacitor. SW2 (Pin 25): Switch Pin for Step-Down Switching Regula- tor 2. Connect one side of step-down switching regulator 2 inductor to this pin. SW3 (Pin 26): Switch Pin for Step-Down Switching Regula- tor 3. Connect one side of step-down switching regulator 3 inductor to this pin. PVIN3 (Pin 27): Power Input for Switching Regulator 3. Tie this pin to the VIN supply. This pin should be bypassed to ground with a 4.7μF or greater ceramic capacitor. VSTB (Pin 28): Voltage Standby. When VSTB is low, DAC reference voltages are selected by bit values in command register VCCR. When VSTB is high, the DAC voltages are forced to the bit values found in the V2 registers. Tie VSTB to ground if unused. PGOOD (Pin 29): Power Good Output. Open drain output pulls down when any regulator falls below power good threshold and during regulator dynamic voltage slew. Un- less disabled in I2C register. Pulls down when all regulators are disabled. SCL (Pin 30): Clock Input Pin for the I2C Serial Port. The I2C logic levels are scaled with respect to DVDD. SDA (Pin 31): Data Input Pin for the I2C Serial Port. The I2C logic levels are scaled with respect to DVDD. DVDD (Pin 32): Supply Voltage for I2C Serial Port. This pin sets the logic reference level of SCL and SDA I2C pins. DVDD resets I2C registers to power on state when driven to <1V. SCL and SDA logic levels are scaled to DVDD. Connect a 0.1μF decoupling capacitor from this pin to ground. BUCK2_FB (Pin 33): Feedback Input for Step-Down Switching Regulator 2. Set full scale output voltage using resistor divider connected from the output of step-down switching regulator 2 to this pin to ground. BUCK3_FB (Pin 34): Feedback Input for Step-Down Switching Regulator 3. Set full scale output voltage using resistor divider connected from the output of step-down switching regulator 3 to this pin to ground. LDO1_FB (Pin 35): Feedback Input for LDO1. Set out- put voltage using a resistor divider connected from LDO1_STDBY to this pin to ground. LDO1_STDBY (Pin 36): Always On LDO1 Output. This pin provides an always on supply voltage useful for light loads such as a watchdog microprocessor or a real time clock. Connect a 1μF capacitor from LDO1_STBY to ground. VIN (Pin 37): Supply Voltage Input. This pin should be bypassed to ground with a 1μF or greater ceramic capacitor. LDO2_FB (Pin 38): Feedback Input for LDO2. Set full scale output voltage using a resistor divider connected from LDO2_OUT to this pin to ground. BUCK1_FB (Pin 39): Feedback Input for Step-Down Switching Regulator 1. Set full scale output voltage using resistor divider connected from the output of step-down switching regulator 1 to this pin to ground. BB_FB (Pin 40): Feedback Input for Buck-Boost Switching Regulator 4. Set the output voltage using resistor divider connected from BB_OUT to this pin to ground. GND (Exposed Pad Pin 41): Ground. The Exposed Pad must be connected to a continuous ground plane on the second layer of the printed circuit board by several inter- connect vias directly under the LTC3589 for maximum heat transfer. |
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