LT4180

5

4180fp

PIN FUNCTIONS

INTVCC (Pin 1): The LDO Output. A low ESR ceramic

capacitor provides decoupling and output compensation.

1μF or more should be used.

DRAIN (Pin 2): Open-Drain of the Output Transistor. This

pin drives either the LED in an opto-isolator, or pulls down

on the regulator control pin.

COMP (Pin 3): Gate of the Output Transistor. This pin allows

additional compensation. It must be left open if unused.

CHOLD1 (Pin 4): Connects to track/hold amplifier hold

capacitor. The other end of this capacitor should be Kelvin

connected to GND.

GUARD2 (Pin 5): Guard Ring Drive for CHOLD2.

CHOLD2 (Pin 6): Connects to track/hold amplifier hold

capacitor. The other end of this capacitor should be Kelvin

connected to GND.

GUARD3 (Pin 7): Guard Ring Drive for CHOLD3.

CHOLD3 (Pin 8): Connects to track/hold amplifier hold

capacitor. The other end of this capacitor should be Kelvin

connected to GND.

GUARD4 (Pin 9): Guard Ring Drive for CHOLD4.

CHOLD4 (Pin 10): Connects to track/hold amplifier hold

capacitor. The other end of this capacitor should be Kelvin

connected to GND.

FB (Pin 11): Receives the feedback voltage from an exter-

nal resistor divider across the main output. An (optional)

capacitor to ground may be added to eliminate high

frequency noise. The time constant for this RC network

should be no greater than 0.1 times the dither frequency.

GND (Pin 12): Ground.

COSC (Pin 13): Oscillator Timing Capacitor. Oscillator fre-

quency is set by this capacitor and ROSC. For best accuracy,

the minimum recommended capacitance is 100pF.

ROSC (Pin 14): Oscillator Timing Resistor. Oscillator

frequency is set by this resistor and COSC.

OSC (Pin 15): Oscillator Output. This output may be

used to synchronize the switching regulator to the

Virtual Remote Sense. This is a high current output capable

of driving opto-isolators. Other isolation methods may

also be used with this output.

DIV2 (Pin 16): Dither Division Ratio Programming Pin.

DIV1 (Pin 17): Dither Division Ratio Programming Pin.

DIV0 (Pin 18): Dither Division Ratio Programming Pin.

Use the following table to program the dither division

DIV2

DIV1

DIV0

DIVISION RATIO

0008

001

16

010

32

011

64

100

128

101

256

110

512

1

1

1

1024

= DIV0 = 0.

SPREAD (Pin 19): Spread Spectrum Enable Input. Dither

phasing is pseudo-randomly adjusted when SPREAD is

tied high.

OV (Pin 20): Overvoltage Comparator Input. This prevents

line drop correction when wiring drops would cause ex-

cessive switching power supply output voltage. Set OV

RUN (Pin 21): The RUN pin provides the user with an accu-

rate means for sensing the input voltage and programming

the start-up threshold for the line drop corrector.

SENSE (Pin 22): Current Sense Input. This input connects

to ground. Kelvin connect the current sense resistor to

this pin and minimize interconnect resistance.