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LT3579 датащи(PDF) 13 Page - Linear Technology |
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LT3579 датащи(HTML) 13 Page - Linear Technology |
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13 / 40 page ![]() LT3579/LT3579-1 13 35791f APPLICATIONS INFORMATION Figure 6. Boost Converter – The Component Values Given Are Typical Values for a 1MHz, 5V to 12V Boost BOOST CONVERTER COMPONENT SELECTION OPTIONAL VIN 5V CIN 22μF RT 86.6k COUT1 10μF RGATE 6.3k RC 8k CC 2.2nF CF 47pF CSS 0.1μF RFB 130k VOUT 12V 1.7A VIN COUT 10μF L1 2.2μH D1 30V, 4A SW1 SW2 GATE VIN RT VC FAULT SHDN FB SS GND SYNC CLKOUT LT3579 37591 F06 100k 200k M1 The LT3579 can be configured as a Boost converter as in Figure 6. This topology allows for positive output voltages that are higher than the input voltage. An external PMOS (optional) driven by the GATE pin of the LT3579 can achieve input or output disconnect during a FAULT event. A single feedback resistor sets the output voltage. For output voltages higher than 40V, see the Charge Pump topology in the Charge Pump Aided Regulators section. Table 1 is a step-by-step set of equations to calculate component values for the LT3579 when operating as a Boost converter. Input parameters are input and output voltage, and switching frequency (VIN, VOUT and fOSC respectively). Refer to the Appendix for further information on the design equations presented in Table 1. Variable Definitions: VIN = Input Voltage VOUT = Output Voltage DC = Power Switch Duty Cycle fOSC = Switching Frequency IOUT = Maximum Output Current IRIPPLE = Inductor Ripple Current RDSON_PMOS = RDSON of External PMOS (set to 0 if not using PMOS) Table 1. Boost Design Equations PARAMETERS/EQUATIONS Step 1: Inputs Pick VIN, VOUT, and fOSC to calculate equations below. Step 2: DC DC VV V VV V OUT IN OUT ≅ + + –. .– . 05 05 027 Step 3: L1 L VV DC fA L VV TYP IN OSC MIN IN = () • • = ( –. . –. 027 18 027 )) •• () •• () = () • 21 41 027 DC Af DC L VV D OSC MAX IN – – –. C C fA OSC • 05 . (1) (2) (3) • Solve equations 1, 2, and 3. • Choose the higher value between LTYP and LMIN for L1. L1 should never exceed LMAX. Step 4: IRIPPLE I VV DC fL RIPPLE IN OSC = () • • –. 027 1 Step 5: IOUT IA I DC OUT RIPPLE = ⎛ ⎝ ⎜ ⎞ ⎠ ⎟ • () 6 2 1 –– Step 6: D1 VV I I R OUT AVG OUT >> ; Step 7: COUT, COUT1 CC IDC fV I R OUT OUT OUT OSC OUT OUT == • • 1 001 0 5 .• – . • • D DSON PMOS _ () Step 8: CIN CC C C I fV A IN PWR VIN IN RIPPLE OSC IN =+ =+ 8 0 005 6 •• . • •• •• • DC fV OSC IN 40 0 005 . Step 9: RFB R VV μA FB OUT = –. . 1 215 83 3 Step 10: RT R f fin MHz and R in k T OSC OSC T = 87 6 1 . –; Ω Step 11: PMOS Only needed for input or output disconnect. See PMOS Selection in the Appendix for information on sizing the PMOS and the biasing resistor, RGATE. Note: The maximum design target for peak switch current is 6A and is used in this table. The final values for COUT and CIN may deviate from the above equations in order to obtain desired load transient performance for a particular application. |
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