PIC16F610-ESLASHML datasheet(33/214 Pages) MICROCHIP

33 / 214 page

DS41288F-page 33

PIC16F610/616/16HV610/616

4.0

I/O PORTS

There are as many as eleven general purpose I/O pins

and an input pin available. Depending on which

peripherals are enabled, some or all of the pins may not

be available as general purpose I/O. In general, when a

peripheral is enabled, the associated pin may not be

used as a general purpose I/O pin.

4.1

PORTA and the TRISA Registers

PORTA is a 6-bit wide, bidirectional port. The

corresponding

data

direction

TRISA

(Register 4-2). Setting a TRISA bit (= 1) will make the

corresponding PORTA pin an input (i.e., disable the

output driver). Clearing a TRISA bit (= 0) will make the

corresponding PORTA pin an output (i.e., enables output

driver and puts the contents of the output latch on the

selected pin). The exception is RA3, which is input only

and its TRIS bit will always read as ‘1’. Example 4-1

shows how to initialize PORTA.

Reading the PORTA register (Register 4-1) reads the

status of the pins, whereas writing to it will write to the

PORT latch. All write operations are read-modify-write

operations. Therefore, a write to a port implies that the

port pins are read, this value is modified and then

written to the PORT data latch. RA3 reads ‘0’ when

MCLRE = 1.

The TRISA register controls the direction of the

PORTA pins, even when they are being used as

analog inputs. The user must ensure the bits in the

TRISA register are maintained set when using them as

analog inputs. I/O pins configured as analog input

always read ‘0’.

EXAMPLE 4-1:

INITIALIZING PORTA

Note:

The ANSEL register must be initialized to

configure an analog channel as a digital

input. Pins configured as analog inputs will

read ‘0’ and cannot generate an interrupt.

BCF

STATUS,RP0

;Bank 0

CLRF

PORTA

;Init PORTA

BSF

STATUS,RP0

;Bank 1

CLRF

ANSEL

;digital I/O

MOVLW

0Ch

;Set RA<3:2> as inputs

MOVWF

TRISA

;and set RA<5:4,1:0>

;as outputs

BCF

STATUS,RP0

;Bank 0

PORTA: PORTA REGISTER

U-0

R/W-x

R/W-0

R-x

R/W-0

—

RA5

RA4

RA3

RA2

RA1

RA0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

Unimplemented: Read as ‘0’

bit 5-0

RA<5:0>: PORTA I/O Pin bit

= PORTA pin is > VIH

= PORTA pin is < VIL

TRISA: PORTA TRI-STATE REGISTER

U-0

R/W-1

R-1

R/W-1

—

TRISA5

TRISA4

TRISA3

TRISA2

TRISA1

TRISA0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

Unimplemented: Read as ‘0’

bit 5-0

TRISA<5:0>: PORTA Tri-State Control bit

= PORTA pin configured as an input (tri-stated)

= PORTA pin configured as an output

Note

TRISA<3> always reads ‘1’.

TRISA<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.

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