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HCS12 датащи(PDF) 137 Page - Freescale Semiconductor, Inc

номер детали HCS12
подробное описание детали  HCS12 Microcontrollers
PDF  452 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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HCS12 датащи(HTML) 137 Page - Freescale Semiconductor, Inc

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S12CPUV2 Reference Manual, Rev. 4.0
Freescale Semiconductor
137
Operation:
If (M)
(Mask) = 0, then branch
Description:
Performs a bitwise logical AND of memory location M and the mask supplied
with the instruction, then branches if and only if all bits with a value of 1 in
the mask byte correspond to bits with a value of 0 in the tested byte. Mask
operands can be located at PC + 1, PC + 2, or PC + 4, depending on
addressing mode. The branch offset is referenced to the next address after
the relative offset (rr) which is the last byte of the instruction object code.
See 3.8 Relative Addressing Mode for details of branch execution.
BRCLR
Branch if Bits Cleared
BRCLR
CCR Details:
S
X
HIN
Z
V
C
––––––––
Source Form
Address
Mode(1)
Object Code
Access Detail
HCS12
M68HC12
BRCLR opr8a, msk8, rel8
BRCLR opr16a, msk8, rel8
BRCLR oprx0_xysp, msk8, rel8
BRCLR oprx9,xysp, msk8, rel8
BRCLR oprx16,xysp, msk8, rel8
DIR
EXT
IDX
IDX1
IDX2
4F dd mm rr
1F hh ll mm rr
0F xb mm rr
0F xb ff mm rr
0F xb ee ff mm rr
rPPP
rfPPP
rPPP
rfPPP
PrfPPP
rPPP
rfPPP
rPPP
rffPPP
frPffPPP
1. Indirect forms of indexed addressing cannot be used with this instruction.



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