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LMP8358 датащи(PDF) 8 Page - National Semiconductor (TI) |
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LMP8358 датащи(HTML) 8 Page - National Semiconductor (TI) |
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8 / 32 page ![]() Note 7: Slew rate is the average of the rising and falling slew rates. Note 8: The offset voltage average drift is determined by dividing the value of V OS at the temperature extremes by the total temperature change. Note 9: Load for these tests is shown in the Timing Diagram Test Circuit. Connection Diagram 14-Pin SOIC/ 14-Pin TSSOP 30045402 Top View Pin Descriptions Pin Name Communication Mode Serial Parallel +IN Positive Input −IN Negative Input REFS Reference Sense REFF Reference Force FB Feedback OUT Output V+ Positive Supply VHSER/VLPAR Set High Set Low V− Negative Supply VLSER/VHPAR Set Low Set High CSB/SHDN Chip Select Shutdown (Active High) SCK/G2 Serial Clock Gain (MSB) SDI/G1 Serial Data In Gain SDO/G0 Serial Data Out Gain (LSB) Ordering Information Package Part Number Package Marking Transport Media NSC Drawing 14-Pin SOIC LMP8358MA LMP8358MA 55 Units/Rail M14A LMP8358MAX 2.5k Units Tape and Reel 14-Pin TSSOP LMP8358MT LMP8358MT 94 Units/Rail MTC14 LMP8358MTX 2.5k Units Tape and Reel www.national.com 8 |
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