Selection Table

Most features are common to all devices, the main feature distinguishing them are Memory capacity, A/D Converter,

Timer Module types and stack capacity. The following table summarises the main features of each device.

Part No.

Program

Memory

Data

Memory

Data

EEPROM

I/O

Ext.

Int.

A/D

Timer

Module

Comparator

DC-DC

Converter

Stack

Package

HT68F03M

1K

´14

64

´864´88

1

¾

10-bit CTM

´1,

10-bit STM

´1

1

Ö

4

16NSOP

HT68F04M

2K

´15

96

´864´88

1

¾

10-bit CTM

´1,

10-bit STM

´1

1

Ö

8

16NSOP

HT66F03M

1K

´14

64

´864´8

8

1

12-bit

´4

10-bit CTM

´1,

10-bit STM

´1

1

Ö

4

16NSOP

HT66F04M

2K

´15

96

´864´8

8

1

12-bit

´4

10-bit CTM

´1,

10-bit ETM

´1,

10-bit STM

´1

1

Ö

8

16NSOP

Block Diagram

The following block diagram illustrates the dual-chip structure of the devices, where an individual MCU and DC-DC

Converter devices are combined into a single package.

HT68F03M/HT68F04M/HT66F03M/HT66F04M

Rev. 1.10

2

May 24, 2010

H T 7 7 3 0

V S S

G N D

P A 0 / C + / A N 0

P A 1 / C - / A N 1 / V R E F

P A 2 / C X / [ T P 0 ] / A N 2

P A 3 / I N T / T C K 1 / T P 0 / A N 3

P A 4 / T C K 0 / T P 1

P A 5 / [ T P 0 ] / O S C 2

P A 6 / [ T C K 0 ] / [ T P 1 ] / O S C 1

P A 7 / [ I N T ] / [ T C K 0 ] / [ T C K 1 ] / [ T P 1 ] / R E S

L X

C E

V D D

V O U T

H T 6 6 F 0 x

H T 6 8 F 0 x

Internal Chip Interconnection Diagram

Note that the HT68F0x devices do not contain VREF or ANx A/D converter pins.