ADP1883ARMZ-0.3-R7 datasheet(21/40 Pages) AD

21 / 40 page

ADP1882/ADP1883

Rev. 0 | Page 21

Although the ADP1882/ADP1883 have only four discrete current-

sense gain settings for a given RON variable, Table 6 and Figure 71

outline several available options for the valley current setpoint

based on various RON values.

The valley current limit is programmed as outlined in Table 6

and Figure 71. The inductor chosen must be rated to handle the

peak current, which is equal to the valley current from Table 6

plus the peak-to-peak inductor ripple current (see the Inductor

Selection section). In addition, the peak current value must be

used to compute the worst-case power dissipation in the

MOSFETs (see Figure 72).

Table 6. Valley Current Limit Program1

RON

(mΩ)

Valley Current Level

47 kΩ

22 kΩ

Open

100 kΩ

ACS = 3.4 V/V

ACS = 6.6 V/V

ACS = 26.7 V/V

ACS = 13.4 V/V

1.5

38.5

28.8

2.5

23.1

38.46

19.2

3.5

32.97

16.5

4.5

25.64

12.8

23.08

11.5

5.5

20.98

10.5

23.08

11.54

5.77

30.769

15.38

7.692

3.85

of 40

25.641

12.82

6.41

3.21

1 Refer to Figure 71 for more information and a graphical representation.

10 11 12 13 14 15 16 17 18

RON (mΩ)

RES = 47k

Ω

ACS = 6.6V/V

RES = 22k

Ω

ACS = 3.4V/V

RES = 100k

Ω

ACS = 13.4V/V

RES = OPEN

ACS = 26.7V/V

Figure 71. Valley Current-Limit Value vs. RON of the Lower-Side MOSFET

for Each Programming Resistor (RES)

INDUCTOR

CURRENT

VALLEY CURRENT-LIMIT

THRESHOLD (SET FOR 25A)

ΔI = 33%

OF 30A

COMP

OUTPUT

SWING

COMP

OUTPUT

2.4V

0.9V

35A

30A

32.25A

37A

49A

39.5A

ΔI = 65%

OF 37A

ΔI = 45%

OF 32.25A

MAXIMUM DC LOAD

CURRENT

Figure 72. Valley Current-Limit Threshold in Relation to Inductor Ripple Current

HICCUP MODE DURING SHORT CIRCUIT

A current-limit violation occurs when the current across

the source and drain of the lower-side MOSFET exceeds the

current-limit setpoint. When 32 current-limit violations are

detected, the controller enters the idle mode and turns off the

MOSFETs for 6 ms, allowing the converter to cool down. Then,

the controller reestablishes soft start and begins to cause the

output to ramp up again (see Figure 73). While the output

ramps up, COMP is monitored to determine if the violation is

still present. If it is still present, the idle event occurs again,

followed by the full-chip power-down sequence. This cycle

continues until the violation no longer exists. If the violation

disappears, the converter is allowed to switch normally,

maintaining regulation.

CLIM

ZERO

CURRENT

REPEATED CURRENT-LIMIT

VIOLATION DETECTED

A PREDE

OF PULS

ALLO

TERMINED NUMBER

ES IS COUNTED TO

W THE CONVERTER

COOL DOWN

SOFT START IS

REINITIALIZED TO

MONITOR IF THE

VIOLATION

STILL EXISTS

Figure 73. Idle Mode Entry Sequence Due to Current-Limit Violations

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