PCF2113EUSLASH2SLASHF4 datasheet(23/65 Pages) NXP

23 / 65 page

PCF2113_FAM_4

Product data sheet

Rev. 04 — 4 March 2008

23 of 65

NXP Semiconductors

PCF2113x

LCD controllers/drivers

8.15 Power-down mode

The chip can be put into Power-down mode by applying an external HIGH level to the

PD pin. In Power-down mode all static currents are switched off (no internal oscillator, no

bias level generation and all LCD outputs are internally connected to VSS).

During power-down, information in the RAMs and the chip state are preserved. Instruction

execution during power-down is possible when pin OSC is externally clocked.

8.16 Reset function

The PCF2113x automatically initializes (resets) when power is turned on. The chip

executes a reset sequence, including a ‘clear display’, requiring 165 oscillator cycles. After

the reset the chip has the state shown in Table 8.

Von(RMS) = 0.745Voper

Voff(RMS) = 0.333Voper

Fig 17. MUX 1:2 LCD waveforms; Icon mode (b)

mge998

frame n

+ 1

frame n

Voper

2/3Voper

1/3Voper

−1/3Voper

−2/3Voper

−Voper

Voper

2/3Voper

1/3Voper

−1/3Voper

−2/3Voper

−Voper

Voper

2/3Voper

1/3Voper

−1/3Voper

−2/3Voper

−Voper

state 3

COL 1

−

ROW 1 to 16

state 2

COL 2

−

ROW 17

state 1

COL 1

−

ROW 17

state 3 (OFF)

R17

R18

R1-16

state 1 (ON)

state 2 (OFF)

off

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2.23

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