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PCA9516AD датащи(PDF) 9 Page - NXP Semiconductors |
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PCA9516AD датащи(HTML) 9 Page - NXP Semiconductors |
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9 / 19 page ![]() PCA9516A_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 23 April 2009 9 of 19 NXP Semiconductors PCA9516A 5-channel I2C-bus hub [1] For operation between published voltage ranges, refer to worst case parameter in both ranges. [2] Typical value taken at 2.5 V and 25 °C. [3] VIL specification is for the first LOW level seen by the SDAn/SCLn lines. VILc is for the second and subsequent LOW levels seen by the SDAn/SCLn lines. Table 6. Static characteristics (VCC = 2.3 V to 2.7 V) VCC = 2.3 V to 2.7 V[1]; GND = 0 V; Tamb = −40 °C to +85 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ[2] Max Unit Supplies VCC supply voltage 2.3 - 2.7 V ICCH HIGH-level supply current both channels HIGH; VCC = 2.7 V; SDAn = SCLn = VCC - 2.1 5 mA ICCL LOW-level supply current both channels LOW; VCC = 2.7 V; one SDAn and one SCLn = GND, other SDAn and SCLn open - 4.6 10 mA ICCLc contention LOW-level supply current VCC = 2.7 V; SDAn = SCLn = GND - 3.9 10 mA Input SCLn; input/output SDAn VIH HIGH-level input voltage 0.7VCC - 5.5 V VIL LOW-level input voltage [3] −0.5 - +0.3VCC V VILc contention LOW-level input voltage [3] −0.5 - +0.4 V VIK input clamping voltage II = −18 mA - - −1.2 V ILI input leakage current VI = 2.7 V −1- +1 µA IIL LOW-level input current SDAn, SCLn; VI = 0.2 V - - 5 µA VOL LOW-level output voltage IOL = 0 mA or 6 mA 0.47 0.52 0.6 V VOL−VILc difference between LOW-level output and LOW-level input voltage contention guaranteed by design - - 70 mV Ci input capacitance VI = 3 V or 0 V - 6 10 pF Enable inputs EN1 to EN4 VIL LOW-level input voltage −0.5 - +0.8 V VIH HIGH-level input voltage 1.5 - 5.5 V IIL LOW-level input current EN1 to EN4; VI = 0.2 V - −10 −30 µA ILI input leakage current −1- +1 µA Ci input capacitance VI = 3 V or 0 V - 6 7 pF |
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