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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STMPE610 датащи(PDF) 23 Page - STMicroelectronics |
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STMPE610 датащи(HTML) 23 Page - STMicroelectronics |
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23 / 56 page  STMPE610 Interrupt system Doc ID 15432 Rev 3 23/56 GPIO_INT_EN GPIO interrupt enable register Address: 0x0C Type: R/W Reset: 0x10 Description: The interrupt status register monitors the status of the interruption from a particular interrupt source to the host. Regardless of whether the IER bits are enabled, the ISR bits are still updated. Writing '1' to this register clears the corresponding bits. Writing '0' has no effect. GPIO_INT_STA GPIO interrupt status register Address: 0x0D Type: R/W Reset: 0x00 Description: The GPIO interrupt status register monitors the status of the interruption from a particular GPIO pin interrupt source to the host. Regardless of whether or not the GPIO_STA bits are enabled, the GPIO_STA bits are still updated. The ISG[7:0] bits are the interrupt status bits corresponding to the GPIO[7:0] pins. Writing '1' to this register clears the corresponding bits. Writing '0' has no effect. 76 543 2 1 0 IEG[x] [7:0] IEG[x]: Interrupt enable GPIO mask (where x = 7 to 0) 1: Writing ‘1’ to the IE[x] bit enables the interruption to the host 76 543 2 1 0 ISG[x] [7:0] ISG[x]: GPIO interrupt status (where x = 7 to 0) Read: Interrupt status of the GPIO[x]. Reading the register will clear any bits that have been set to '1' Write: Writing to this register has no effect |
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