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AD7626 датащи(PDF) 21 Page - Analog Devices |
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AD7626 датащи(HTML) 21 Page - Analog Devices |
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21 / 28 page ![]() AD7626 Rev. A | Page 21 of 2 Wake-Up Time from EN1= 0, EN0 = 0 The AD7626 powers down when EN1 and EN0 are both set to 0. Selecting the correct reference choice from power-down, the user sets EN1 and EN0 to the required value shown in Table 8. The user may immediately apply CNV pulses to receive data conversion results. Typical wake-up times for the selected reference settings are shown in Table 9. Each time represents the duration from the EN1, EN0 logic transition to when the output of the ADC is settled to 0.5 LSB accuracy. Table 9. Wake-Up Time from EN1=0, EN0 = 0 Reference Mode EN1 EN0 Wake-Up Time (0.5 LSB Accuracy) A Power-up Internal reference and inter- nal reference buffer in use 1 1 9.5 sec B External 1.2 V reference applied to REFIN pin 0 1 25 ms C External 4.096 V reference applied to REF pin 1 0 65 μs POWER SUPPLY The AD7626 uses both 5 V (VDD1) and 2.5 V (VDD2) power supplies, as well as a digital input/output interface supply (VIO). VIO allows a direct interface with 2.5 V logic only. VIO and VDD2 can be taken from the same 2.5 V source; however, it is best practice to isolate the VIO and VDD2 pins using separate traces as well as to decouple each pin separately. The 5 V and 2.5 V supplies required for the AD7626 can be generated using Analog Devices, Inc., LDOs such as the ADP3330-2.5, ADP3330-5, ADP3334, and ADP1708. 50 55 60 65 70 75 80 85 90 1 10 100 1k 10k SUPPLY FREQUENCY (Hz) INTERNAL REFERENCE USED VDD2 VDD1 Figure 38. PSRR vs. Supply Frequency (350 mV pp Ripple on VDD2, 600 mV Ripple on VDD1) Power-Up When powering up the AD7626 device, first apply the 2.5 V VDD2 supply and VIO voltage to the device. After the VIO and 2.5 V VDD2 have been established, apply the 5 V VDD1 supply. If using an external reference with the AD7626, ensure that the EN0 and EN1 pins are connected to the correct logic values associated with the reference option of choice and then apply the external reference voltage. Finally, apply the analog inputs to the ADC. 25 20 15 10 5 0 01 8 6 4 2 THROUGHPUT (MSPS) 0 VDD1 EXTERNAL REFERENCE VDD1 INTERNAL REFERENCE VDD2 INTERNAL REFERENCE VDD2 EXTERNAL REFERENCE VIO EXTERNAL REFERENCE VIO INTERNAL REFERENCE Figure 39. Current Consumption vs. Sampling Rate 160 140 120 100 80 60 40 20 0 01 9 8 7 6 5 4 3 2 1 THROUGHPUT (MSPS) 0 INTERNAL REFERENCE EXTERNAL REFERENCE Figure 40. Power Dissipation vs. Sampling Rate |
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