74LVC2G74_6

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 06 — 23 December 2009

8 of 21

NXP Semiconductors

74LVC2G74

Single D-type flip-flop with set and reset; positive edge trigger

11. Dynamic characteristics

Table 9.

Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.

Symbol Parameter

Conditions

−40 °C to +85 °C

−40 °C to +125 °C

Unit

Min

Typ[1]

Max

Min

Max

propagation delay

CP to Q, Q; see Figure 8

[2]

1.5

6.0

13.4

1.5

13.4

ns

1.0

3.5

7.1

1.0

7.1

ns

1.0

3.5

7.1

1.0

7.1

ns

1.0

3.5

5.9

1.0

5.9

ns

1.0

2.5

4.1

1.0

4.1

ns

SD to Q, Q; see Figure 9

[2]

1.5

6.0

12.9

1.5

12.9

ns

1.0

3.5

7.0

1.0

7.0

ns

1.0

3.5

7.0

1.0

7.0

ns

1.0

3.0

5.9

1.0

5.9

ns

1.0

2.5

4.1

1.0

4.1

ns

RD to Q, Q; see Figure 9

[2]

1.5

5.0

12.9

1.5

12.9

ns

1.0

3.5

7.0

1.0

7.0

ns

1.0

3.5

7.0

1.0

7.0

ns

1.0

3.0

5.9

1.0

5.9

ns

1.0

2.5

4.1

1.0

4.1

ns

pulse width

CP HIGH or LOW;

see Figure 8

6.2

-

-

6.2

-

ns

2.7

-

-

2.7

-

ns

2.7

-

-

2.7

-

ns

2.7

1.3

-

2.7

-

ns

2.0

-

-

2.0

-

ns

SD and RD LOW;

see Figure 9

6.2

-

-

6.2

-

ns

2.7

-

-

2.7

-

ns

2.7

-

-

2.7

-

ns

2.7

1.6

-

2.7

-

ns

2.0

-

-

2.0

-

ns