74LVC2G00_8

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 08 — 26 October 2009

12 of 16

NXP Semiconductors

74LVC2G00

Dual 2-input NAND gate

Fig 13. Package outline SOT996-2 (XSON8U)

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

JEITA

SOT996-2

- - -

- - -

SOT996-2

07-12-18

07-12-21

UNIT

A

max

mm

0.5

0.05

0.00

0.35

0.15

3.1

2.9

0.5

1.5

0.5

0.3

0.6

0.4

0.1

0.05

DIMENSIONS (mm are the original dimensions)

XSON8U: plastic extremely thin small outline package; no leads;

8 terminals; UTLP based; body 3 x 2 x 0.5 mm

0

1

2 mm

scale

b

D

2.1

1.9

E

e

L

0.15

0.05

v

w

0.05

y

0.1

C

y

C

X

b

14

85

e

A

C

B

C

L

terminal 1

index area

B

A

D

E

detail X

A