74LVC1G74_8

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 08 — 3 December 2009

2 of 21

NXP Semiconductors

74LVC1G74

Single D-type flip-flop with set and reset; positive edge trigger

3.

Ordering information

4.

Marking

[1]

The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5.

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature range Name

Description

Version

74LVC1G74DP

−40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package; 8 leads; body

width 3 mm; lead length 0.5 mm

SOT505-2

74LVC1G74DC

−40 °C to +125 °C

VSSOP8

plastic very thin shrink small outline package; 8 leads;

body width 2.3 mm

SOT765-1

74LVC1G74GT

−40 °C to +125 °C

XSON8

plastic extremely thin small outline package; no leads; 8

terminals; body 1

× 1.95 × 0.5 mm

SOT833-1

74LVC1G74GF

−40 °C to +125 °C

XSON8

extremely thin small outline package; no leads;

8 terminals; body 1.35

× 1 × 0.5 mm

SOT1089

74LVC1G74GD

−40 °C to +125 °C

XSON8U

plastic extremely thin small outline package; no leads;

8 terminals; UTLP based; body 3

× 2 × 0.5 mm

SOT996-2

74LVC1G74GM

−40 °C to +125 °C

XQFN8U

plastic extremely thin quad flat package; no leads;

8 terminals; UTLP based; body 1.6

× 1.6 × 0.5 mm

SOT902-1

Table 2.

Marking codes

Type number

Marking code[1]

74LVC1G74DP

V74

74LVC1G74DC

V74

74LVC1G74GT

V74

74LVC1G74GF

Y4

74LVC1G74GD

V74

74LVC1G74GM

V74

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

001aah757

RD

FF

SD

Q

Q

Q

Q

SD

CP

CP

D

D

RD

001aah758

C1

S

1D

R