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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PAM1707BZKB4 датащи(PDF) 1 Page - Texas Instruments |
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PAM1707BZKB4 датащи(HTML) 1 Page - Texas Instruments |
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1 / 198 page  AM1707 www.ti.com SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010 AM1707 ARM Microprocessor Check for Samples: AM1707 1 AM1707 ARM Microprocessor 1.1 Features 123 – 32 Independent DMA Channels • Highlights – 8 Quick DMA Channels – 375/456-MHz ARM926EJ-S™ RISC Core – Programmable Transfer Burst Size – ARM9 Memory Architecture • 128K-Byte RAM Memory – Programmable Real-Time Unit Subsystem • 3.3V LVCMOS IOs (except for USB interfaces) – Enhanced Direct-Memory-Access Controller 3 (EDMA3) • Two External Memory Interfaces: – Two External Memory Interfaces – EMIFA – Three Configurable 16550 type UART • NOR (8-/16-Bit-Wide Data) Modules • NAND (8-/16-Bit-Wide Data) – Two Serial Peripheral Interfaces (SPI) • 16-Bit SDRAM With 128MB Address – Multimedia Card (MMC)/Secure Digital (SD) Space Card Interface with Secure Data I/O (SDIO) – EMIFB – Two Master/Slave Inter-Integrated Circuit • 32-Bit or 16-Bit SDRAM With 256MB – USB 2.0 OTG Port With Integrated PHY Address Space – Three Multichannel Audio Serial Ports • Three Configurable 16550 type UART Modules: – 10/100 Mb/s Ethernet MAC (EMAC) – UART0 With Modem Control Signals – One 64-Bit General-Purpose Timer – 16-byte FIFO – One 64-bit General-Purpose/Watchdog Timer – 16x or 13x Oversampling Option – Three Enhanced Pulse Width Modulators • LCD Controller – Three 32-Bit Enhanced Capture Modules • Two Serial Peripheral Interfaces (SPI) Each With One Chip-Select • Applications • Programmable Real-Time Unit Subsystem – Industrial Automation (PRUSS) – Home Automation – Two Independent Programmable Realtime – Test and Measurement Unit (PRU) Cores – Portable Data Terminals • 32-Bit Load/Store RISC architecture – Educational Consoles • 4K Byte instruction RAM per core – Power Protection Systems • 512 Bytes data RAM per core • 375/456-MHz ARM926EJ-S™ RISC Core • PRU Subsystem (PRUSS) can be disabled – 32-Bit and 16-Bit (Thumb®) Instructions via software to save power – Single Cycle MAC – Standard power management mechanism – ARM® Jazelle® Technology • Clock gating – EmbeddedICE-RT™ for Real-Time Debug • Entire subsystem under a single PSC • ARM9 Memory Architecture clock gating domain – 16K-Byte Instruction Cache – Dedicated interrupt controller – 16K-Byte Data Cache – Dedicated switched central resource – 8K-Byte RAM (Vector Table) • Multimedia Card (MMC)/Secure Digital (SD) – 64K-Byte ROM Card Interface with Secure Data I/O (SDIO) • Enhanced Direct-Memory-Access Controller 3 • Two Master/Slave Inter-Integrated Circuit (I2C (EDMA3): Bus™) – 2 Transfer Controllers • One Host-Port Interface (HPI) With 16-Bit-Wide 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 ARM926EJ-S, EmbeddedICE-RT, ETM9, CoreSight are trademarks of ARM Limited. 3 ARM, Jazelle are registered trademarks of ARM Limited. ADVANCE INFORMATION concerns new products in the sampling Copyright © 2010, Texas Instruments Incorporated or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. |
Аналогичный номер детали - PAM1707BZKB4 |
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Аналогичное описание - PAM1707BZKB4 |
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