X24645

13

SYMBOL TABLE

WAVEFORM

INPUTS

OUTPUTS

Must be

steady

Will be

steady

May change

from LOW

to HIGH

Will change

from LOW

to HIGH

May change

from HIGH

to LOW

Will change

from HIGH

to LOW

Don’t Care:

Changes

Allowed

Changing:

State Not

Known

N/A

Center Line

is High

Impedance

The write cycle time is the time from a valid stop

condition of a write sequence to the end of the internal

erase/program cycle. During the write cycle, the

X24645 bus interface circuits are disabled, SDA is

allowed to remain HIGH, and the device does not

respond to its slave address.

Bus Timing

2783 ILL F17

tSU:STA

tHD:STA

tHD:DAT

tSU:DAT

tLOW

tSU:STO

tR

tBUF

SCL

SDA IN

SDA OUT

tDH

tAA

tF

tHIGH

Write Cycle Limits

2783 FRM T11

Symbol

Parameter

Min.

Max.

Units

(6)

Write Cycle Time

5

10

ms

Bus Timing

2783 ILL F18

SCL

SDA

8th BIT

WORD n

ACK

tWR

STOP

CONDITION

START

CONDITION

time the device requires to automatically complete the internal write operation.

Guidelines for Calculating Typical Values of

Bus Pull-Up Resistors

2783 ILL F19

120

100

80

40

60

20

20

40

60

80 100 120

0

0

BUS CAPACITANCE (pF)

MIN.

RESISTANCE

MAX.

RESISTANCE

RMAX =

CBUS

t R

RMIN =

IOL MIN

VCC MAX

=1.8K

Ω