High Bandwidth, Fast Fault Response Current Sensor IC

In Thermally Enhanced Package

ACS709

13

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

through the internal PMOS pull-up. The slope is determined

7. When the FAULT_EN pin is brought low, if the fault condi-

tion still exists, the latched ¯F¯¯A¯¯U¯¯L¯¯T¯ pin will stay low until

the fault condition is removed, then it will start resetting.

8. At this point there is a fault condition, and the part is enabled

user-set delay, so the fault is latched earlier. The new delay

time can be calculated by equation 1, after substituting the

Chopper Stabilization Technique

Chopper Stabilization is an innovative circuit technique that is

used to minimize the offset voltage of a Hall element and an asso-

ciated on-chip amplifier. Allegro patented a Chopper Stabiliza-

tion technique that nearly eliminates Hall IC output drift induced

by temperature or package stress effects. This offset reduction

technique is based on a signal modulation-demodulation process.

Modulation is used to separate the undesired dc offset signal from

the magnetically induced signal in the frequency domain. Then,

using a low-pass filter, the modulated DC offset is suppressed

while the magnetically induced signal passes through the filter.

As a result of this chopper stabilization approach, the output

voltage from the Hall IC is desensitized to the effects of tempera-

ture and mechanical stress. This technique produces devices that

have an extremely stable Electrical Offset Voltage, are immune to

thermal stress, and have precise recoverability after temperature

cycling.

This technique is made possible through the use of a BiCMOS

process that allows the use of low-offset and low-noise amplifiers

in combination with high-density logic integration and sample

and hold circuits.

Amp

Regulator

Clock/Logic

Hall Element

Low-Pass

Filter

Concept of Chopper Stabilization Technique