WM2638

Production Data

WOLFSON MICROELECTRONICS LTD

PD Rev 1.0 July 99

9

Examples:

1.

Set internal reference voltage to 2.048V

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

1

x

0

1

x

x

x

x

x

x

x

x

x

x

1

0

2.

Write new DAC A value and update DAC A output

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

0

x

0

0

New DAC A output value

FUNCTION OF THE LATCH CONTROL BITS (D15 AND D12)

PURPOSE AND USE OF THE DOUBLE BUFFER

Normally only one DAC output can change after a write. The double buffer allows both DAC outputs

to change after a single write. This is achieved by the two following steps.

• A double buffer only write is executed to store the new DAC B data without changing the DAC A

and B outputs.

• Following the previous step, a write to latch A is executed. This writes the serial interface register

(SIR) data to latch A and also writes the double buffer contents to latch B. Thus both DACs

receive their new data at the same time and so both DAC outputs begin to change at the same

time.

Unless a double buffer only write is issued, the latch B and double buffer contents are identical.

Thus, following a write to latch A or B with another write to latch A does not change the latch B

contents.

Three data transfer options are possible. All transfers occur immediately after NCS goes high (or on

the sixteenth positive SCLK edge, whichever is earlier) and are described in the following sections).

LATCH A WRITE, LATCH B UPDATE (D15 = HIGH, D12 = LOW)

The serial interface register (SIR) data are written to latch A and the double buffer latch contents

are written to latch B. The double buffer contents are unaffected. This program bit condition allows

simultaneous output updates of both DACs.

SERIAL

INTERFACE

REGISTER

D12 = LOW

D15 = HIGH

DOUBLE

BUFFER LATCH

LATCH B

TO DAC B

LATCH A

TO DAC A

Figure 2 Latch A Write, Latch B Update

LATCH B AND DOUBLE BUFFER 1 WRITE (D15 = LOW, D12 = LOW)

The SIR data are written to both latch B and the double buffer. Latch A is unaffected.

SERIAL

INTERFACE

REGISTER

D12 = LOW

D15 = LOW

DOUBLE

BUFFER LATCH

LATCH B

TO DAC B

LATCH A

TO DAC A

Figure 3 Latch B and Double Buffer Write

DOUBLE BUFFER ONLY WRITE (D15 = LOW, D12 = HIGH)

The SIR data are written to the double buffer only. Latch A and B contents are unaffected.