поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

WM2636CD датащи(PDF) 5 Page - Wolfson Microelectronics plc

номер детали WM2636CD
подробное описание детали  12-bit Serial Input Voltage Output DAC with Internal Reference
PDF  10 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM2636CD датащи(HTML) 5 Page - Wolfson Microelectronics plc

  WM2636CD Datasheet HTML 1Page - Wolfson Microelectronics plc WM2636CD Datasheet HTML 2Page - Wolfson Microelectronics plc WM2636CD Datasheet HTML 3Page - Wolfson Microelectronics plc WM2636CD Datasheet HTML 4Page - Wolfson Microelectronics plc WM2636CD Datasheet HTML 5Page - Wolfson Microelectronics plc WM2636CD Datasheet HTML 6Page - Wolfson Microelectronics plc WM2636CD Datasheet HTML 7Page - Wolfson Microelectronics plc WM2636CD Datasheet HTML 8Page - Wolfson Microelectronics plc WM2636CD Datasheet HTML 9Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 10 page
background image
WM2636
Production Data
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 July 1999
5
SERIAL INTERFACE
*
t
SUC16FS
t
SUFS
SCLK
DIN
NCS
FS
12
34
5
15
16
D0
D1
D12
D13
D14
D15
t
WL
t
WH
t
SUD
t
HD
t
SUCSFS
t
WHFS
t
SUC16CS
Figure 1 Timing Diagram
Test Conditions:
RL = 10k
Ω, CL = 100pF. VDD = 5V
± 10%, V
REF = 2.048V and VDD = 3V
± 10%, V
REF = 1.024V over recommended operating
free-air temperature range (unless noted otherwise).
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tSUCSFS
Setup time NCS low before negative FS edge.
10
ns
tSUFS
Setup time FS low before first negative SCLK edge.
8ns
tSUC16FS
Setup time, sixteenth negative edge after FS low on
which D0 is sampled before rising edge of FS.
10
ns
tSUC16CS
Setup time, sixteenth positive SCLK edge (first
positive after D0 sampled) before NCS rising edge. If
FS is used instead of the sixteenth positive edge to
update the DAC, then the setup time is between the
FS rising edge and the NCS rising edge.
10
ns
tWH
Pulse duration, SCLK high.
25
ns
tWL
Pulse duration, SCLK low.
25
ns
tSUD
Setup time, data ready before SCLK falling edge.
8ns
tHD
Hold time, data held valid after SCLK falling edge.
5ns
tWHFS
Pulse duration, FS high.
20
ns



Html Pages

1 2 3 4 5 6 7 8 9 10


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com