Wolfson Microelectronics

12

WM0831, WM0832

Analogue Inputs.

While sampling the analogue inputs short spikes of

current enter a “+” input and flow out of the corresponding

“-” input at the clock edges during conversion. This

current does not cause errors as it decays rapidly and the

internal comparator is strobed at the end of a clock

period. Care should be exercised if bypass capacitors are

used at the inputs, as an apparent offset error can be

caused by the capacitor averaging the input current and

developing a voltage across the source resistance.

Bypass capacitors should not be used with a source

resistance greater than 1k

Ω.

In considering error sources, input leakage current will also

cause a voltage drop across the source resistance and

hence high impedance sources should be buffered.

In differential mode there is a 1/2 clock period interval be-

tween sampling the “+” and the “-” inputs. If there is a change

in common mode voltage during this interval an error could

notionally result.

For a sinusoidal common mode signal the error is given

by:

VERROR = VPEAK (2

πfCM) (1/(2fCLK))

Where

VPEAK = Peak common mode voltage