ADP1870ARMZ-0.6-R7 datasheet(28/44 Pages) AD

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ADP1870/ADP1871

Rev. 0 | Page 28 of 44

THERMAL CONSIDERATIONS

The ADP1870/ADP1871 are used for dc-to-dc, step down, high

current applications that have an on-board controller, an on-board

LDO, and on-board MOSFET drivers. Because applications may

require up to 20 A of load current delivery and be subjected to

high ambient temperature surroundings, the selection of external

upper- and lower-side MOSFETs must be associated with careful

thermal consideration to not exceed the maximum allowable

junction temperature of 125°C. To avoid permanent or irreparable

damage if the junction temperature reaches or exceeds 155°C, the

part enters thermal shutdown, turning off both external MOSFETs,

and does not reenable until the junction temperature cools to

140°C (see the On-Board Low Dropout Regulator section).

In addition, it is important to consider the thermal impedance

of the package. Because the ADP1870/ADP1871 employ an on-

board LDO, the ac current (fxCxV) consumed by the internal

drivers to drive the external MOSFETs adds another element of

power dissipation across the internal LDO. Equation 3 shows the

power dissipation calculations for the integrated drivers and for

the internal LDO.

Table 9 lists the thermal impedance for the ADP1870/ADP1871,

which are available in a 10-lead MSOP.

Table 9. Thermal Impedance for 10-lead MSOP

Parameter

Thermal Impedance

10-Lead MSOP θJA

2-Layer Board

213.1°C/W

4-Layer Board

171.7°C/W

Figure 83 specifies the maximum allowable ambient temperature

that can surround the ADP1870/ADP1871 IC for a specified

high input voltage (VIN). Figure 83 illustrates the temperature

derating conditions for each available switching frequency for

low, typical, and high output setpoints for the 10-lead MSOP

package. All temperature derating criteria are based on a

maximum IC junction temperature of 125°C.

150

140

130

120

110

100

5.5

19.0

17.5

16.0

14.5

13.0

11.5

10.0

8.5

7.0

VIN (V)

VOUT = 0.8V

VOUT = 1.8V

VOUT = HIGH SETPOINT

600kHz

300kHz

1MHz

Figure 83. Ambient Temperature vs. VIN for 10-Lead MSOP (171°C/W),

4-Layer EVB, CIN = 4.3 nF (Upper-/Lower-Side MOSFET)

The maximum junction temperature allowed for the ADP1870/

ADP1871 ICs is 125°C. This means that the sum of the ambient

temperature (TA) and the rise in package temperature (TR),

which is caused by the thermal impedance of the package and

the internal power dissipation, should not exceed 125°C, as

dictated by the following expression:

= TR × TA

(1)

where:

is the ambient temperature.

is the maximum junction temperature.

is the rise in package temperature due to the power

dissipated from within.

The rise in package temperature is directly proportional to its

thermal impedance characteristics. The following equation

represents this proportionality relationship:

= θJA × PDR(LOSS)

(2)

where:

θJA

is the thermal resistance of the package from the junction to

the outside surface of the die, where it meets the surrounding air.

PDR(LOSS)

is the overall power dissipated by the IC.

The bulk of the power dissipated is due to the gate capacitance

of the external MOSFETs and current running through the on-

board LDO. The power loss equations for the MOSFET drivers

and internal low dropout regulator (see the MOSFET Driver

Loss section in the Efficiency Consideration section) are:

PDR(LOSS)

= [VDR × (fSWCupperFETVDR + IBIAS)] +

[VREG × (fSWClowerFET VREG + IBIAS)]

(3)

where:

CupperFET

is the input gate capacitance of the upper-side MOSFET.

ClowerFET

is the input gate capacitance of the lower-side MOSFET.

IBIAS

is the dc current (2 mA) flowing into the upper- and lower-

side drivers.

VDR

is the driver bias voltage (the low input voltage (VREG)

minus the rectifier drop (see Figure 81)).

VREG

is the LDO output/bias voltage.

)

(

)

(

)

(

)

(

BIAS

REG

total

REG

LOSS

LDO

DISS

−

(4)

where:

PDISS(LDO)

is the power dissipated through the pass device in the

LDO block across VIN and VREG.

Ctotal

is the CGD + CGS of the external MOSFET.

VREG

is the LDO output voltage and bias voltage.

VIN

is the high voltage input.

IBIAS

is the dc input bias current.

PDR(LOSS)

is the MOSFET driver loss.

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