LTC6246CS6 datasheet(14/24 Pages) LINER

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LTC6246/LTC6247/LTC6248

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applicaTions inForMaTion

Input Offset Voltage

The offset voltage will change depending upon which

input stage is active. The PNP input stage is active from

the negative supply rail to approximately 1.2V below the

positive supply rail, then the NPN input stage is activated

for the remaining input range up to the positive supply rail

with the PNP stage inactive. The offset voltage magnitude

for the PNP input stage is trimmed to less than 500µV with

5V total supply at room temperature, and is typically less

than 150μV. The offset voltage for the NPN input stage

is typically less than 1.7mV with 5V total supply at room

temperature.

Input Bias Current

The LTC6246 family uses a bias current cancellation cir-

cuit to compensate for the base current of the PNP input

pair. When the input common mode voltage is less than

200mV, the bias cancellation circuit is no longer effective

and the input bias current magnitude can reach a value

above 1µA. For common mode voltages ranging from

0.2V above the negative supply to 1.2V below the positive

supply, the low input bias current of the LTC6246 family

allows the amplifiers to be used in applications with high

source resistances where errors due to voltage drops

must be minimized.

Output

The LTC6246 family has excellent output drive capability.

The amplifiers can typically deliver over 50mA of output

drive current at a total supply of 5V. The maximum out-

put current is a function of the total supply voltage. As

the supply voltage to the amplifier decreases, the output

current capability also decreases. Attention must be paid

to keep the junction temperature of the IC below 150°C

(refer to the Power Dissipation Section) when the output

is in continuous short circuit. The output of the amplifier

has reverse-biased diodes connected to each supply. If

the output is forced beyond either supply, extremely high

current will flow through these diodes which can result

in damage to the device. Forcing the output to even 1V

beyond either supply could result in several hundred mil-

liamps of current through either diode.

Input Protection

The input stages are protected against a large differential

input voltage of 1.4V or higher by 2 pairs of back-to-back

diodes to prevent the emitter-base breakdown of the input

transistors. In addition, the input and shutdown pins have

reverse biased diodes connected to the supplies. The cur-

rent in these diodes must be limited to less than 10mA.

The amplifiers should not be used as comparators or in

other open loop applications.

ESD

The LTC6246 family has reverse-biased ESD protection

diodes on all inputs and outputs as shown in Figure 1.

Thereisanadditionalclampbetweenthepositiveandnega-

tive supplies that further protects the device during ESD

strikes. Hot plugging of the device into a powered socket

must be avoided since this can trigger the clamp resulting

in larger currents flowing between the supply pins.

Capacitive Loads

The LTC6246/LTC6247/LTC6248 are optimized for high

bandwidthandlowpowerapplications.Consequentlythey

have not been designed to directly drive large capacitive

loads. Increased capacitance at the output creates an ad-

ditional pole in the open loop frequency response, wors-

ening the phase margin. When driving capacitive loads, a

resistor of 10Ω to 100Ω should be connected between the

amplifier output and the capacitive load to avoid ringing

or oscillation. The feedback should be taken directly from

the amplifier output. Higher voltage gain configurations

tend to have better capacitive drive capability than lower

gain configurations due to lower closed loop bandwidth

and hence higher phase margin. The graphs titled Series

Output Resistor vs Capacitive Load demonstrate the tran-

sient response of the amplifier when driving capacitive

loads with various series resistors.

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