LTC2471CDDPBF datasheet(16/20 Pages) LINER

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LTC2471/LTC2473

24713f

APPLICATIONS INFORMATION

There is a limit to how large RS • CIN should be for a given

application. Increasing RS beyond a given point increases

the voltage drop across RS due to the input current,

to the point that signiﬁcant measurement errors exist.

Additionally, for some applications, increasing the RS• CIN

product too much may unacceptably attenuate the signal

at frequencies of interest.

For most applications, it is desirable to implement CIN as

a high-quality 0.1μF ceramic capacitor and to set RS ≤

1k. This capacitor should be located as close as possible

to the actual IN+, IN– and IN package pins. Furthermore,

the area encompassed by this circuit path, as well as the

path length, should be minimized.

In the case of a 2-wire sensor that is not remotely

grounded, it is desirable to split RS and place series

resistors in the ADC input line as well as in the sensor

ground return line, which should be tied to the ADC GND

pin using a star connection topology.

Figure 13 shows the measured LTC2473 INL vs Input

Voltage as a function of RS value with an input capacitor

CIN = 0.1μF.

In some cases, RScanbeincreasedabovetheseguidelines.

The input current is zero when the ADC is either in sleep

or I/O modes. Thus, if the time constant of the input RC

circuit τ = RS • CIN, is of the same order of magnitude or

longer than the time periods between actual conversions,

then one can consider the input current to be reduced

correspondingly.

These considerations need to be balanced out by the input

signal bandwidth. The 3dB bandwidth ≈ 1/(2πRSCIN).

Finally, if the recommended choice for CIN is unacceptable

for the user’s speciﬁc application, an alternate strategy is to

eliminate CIN and minimize CPAR and RS. In practical terms,

this conﬁguration corresponds to a low impedance sensor

directly connected to the ADC through minimum length

traces. Actual applications include current measurements

through low value sense resistors, temperature measure-

ments, low impedance voltage source monitoring, and so

on. The resultant INL vs VIN is shown in Figure 14. The

measurements of Figure 14 include a capacitor CPAR cor-

responding to a minimum sized layout pad and a minimum

width input trace of about 1 inch length.

Signal Bandwidth, Transition Noise and Noise

Equivalent Input Bandwidth

The LTC2471/LTC2473 include a sinc2 type digital ﬁlter. The

ﬁrst notch is located at 500Hz if the 250sps output rate is

selected and 2kHz if the 1ksps output rate is selected. The

calculated input signal attenuation vs. frequency over a

wide frequency range is shown in Figure 15. The calculated

input signal attenuation vs. frequency at low frequencies

is shown in Figure 16. The converter noise level is about

3μVRMS and can be modeled by a white noise source con-

nected at the input of a noise-free converter.

On a related note, the LTC2473 uses two separate A/D

converters to digitize the positive and negative inputs.

Each of these A/D converters has 3μVRMS transition noise.

If one of the input voltages is within this small transition

noise band, then the output will ﬂuctuate one bit, regard-

less of the value of the other input voltage. If both of the

input voltages are within their transition noise bands, the

output can ﬂuctuate 2 bits.

For a simple system noise analysis, the VIN drive circuit can

be modeled as a single-pole equivalent circuit character-

ized by a pole location fi and a noise spectral density ni.

If the converter has an unlimited bandwidth, or at least a

bandwidth substantially larger than fi, then the total noise

contribution of the external drive circuit would be:

n = ni

π /2 • fi

Then, the total system noise level can be estimated as

the square root of the sum of (Vn2) and the square of the

LTC2471/LTC2473 noise ﬂoor.

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