US3033

4-8

Rev. 1.5

1/14/99

APPLICATION INFORMATION

APPLICATION INFORMATION

Introduction

The US3033 device is an application specific product

designed to provide an on board dual supply for the new

generation of microprocessors requiring separate Core

and I/O supplies. One of the processors fitting this re-

quirement is the new Intel P55C

™ multimedia micro-

processor. Intel specifies a Core voltage of 2.8V nominal

(

±100mV max) with maximum Core supply current of

6A while the I/O supply is set for 3.3V with a maximum

I/O current of 0.65A. However in most applications the I/

O regulator also provides the voltage for other IC func-

tions such as the chip set ,Cache,....etc. Typically a

low cost solution such as a Low Dropout Linear Regula-

tor (LDO) is selected to provide the I/O supply with the

maximum designed current of 3A , keeping the power

dissipation and the heat sink to a reasonable size. The

Core supply regulator however if also selected to be a

linear regulator , will be dissipating a maximum of 12.6W

((5V-2.8V)X5.7A) of power, which requires a substantial

amount of heat sinking and perhaps forced air cooling in

order to keep it operational. Some manufacturers sug-

gest using two regulators to current share and therefore

distribute the power dissipation equally between the regu-

lators. The problem is that , in order to equally current

share you need to sense both currents and force the

slave regulator to match the master regulator. This can

be done , but at the cost of the circuit complexity and

much higher system cost and the total power dissipa-

tion is still the same. In fact, if the task is to design a

flexible motherboard to accommodate the Cyrix 6X86L

or their future MMX processors as well, then the power

dissipation could easily reach 20W or more. At this power

dissipation level the choice for a switching regulator

approach becomes evident. However the main reason

that designers have always shied away from the switch-

ing regulators is their higher price tag and more com-

plex circuit design that is associated with this kind of

technique.

The US3033 device is designed to take advantage

of the high efficiency of the switching regulator

technique for the Core supply while maintaining

the low cost LDO regulator for the I/O supply by

offering both control functions in a single 8 pin sur-

face mount package. In fact as the typical application

circuit shows, one can design a complete flexible

motherboard using the US3033 and a few external com-

ponents yielding a very low component count switching

regulator and with an addition of a low cost pass transis-

tor for the I/O supply provide a complete dual supply

power soloution.

LDO Section

The output voltage of the LDO regulator is externally pro-

grammable via 2 external resistors from 1.25V to 5V.

The internal voltage reference of the The LDO regulator

is set to 1.25V and the output of the regulator can be

programmed using the following formula:

Vout=(1+R1/R2)xVref

Where Vref=1.25V Typical

R1=Resistor connected from Vout to the Vfb2 pin of

US3033

R2=Resistor connected from Vfb2 pin to GND.

The US3033 requires the use of an output capacitor as

part of the frequency compensation in order to be stable.

Typical designs for the microprocessor applications use

standard electrolytic capacitors with typical ESR in the

range of 50 to 100 m

Ω and an output capacitance of 500

to 1000uF. Fortunately as the capacitance increases,

the ESR decreases resulting in a fixed RC time con-

stant. The US3033 takes advantage of this phenomena

in making the overall regulator loop stable. For most ap-

plications a minimum of 100uF aluminum electrolytic

capacitor such as Sanyo, MVGX series ,Panasonic FA

series or Nichicon PL series insures both stability and

good transient response.

An external filtering is suggested as shown in the appli-

cation circuit that reduces the switching ripple that might

show in the output of the LDO regulator.

Switching Controller Operation

The operation of the switching controller is as follows :

after the power is applied, the output drive, "Drv1" goes

to 100% duty cycle and the the current in the inductor

charges the output capacitor causing the output voltage

to increase. When output reaches a pre-programmed

set point the feedback pin "Fb1" exceeds 1.25V caus-

ing the output drive to switch low and the "Vhyst" pin to

switch high which jumps the feedback pin higher than

1.25V resulting in a fixed output ripple which is given by

the following equation :

∆Vo=(Rt/Rh)x11

Where:

Rt=Top resistor of the output divider, resistor connected

from Vout to the Vfb1 pin of US3033

Rh=Bottom resistor of the divider, resistor connected from

Vfb1 pin to Vhyst pin.

For example, if Rt=1k and Rh=422k, then the output

ripple is :

∆Vo=(1/422)x11=26mV