TS2GDOM40V datasheet(43/52 Pages) TRANSCEND

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Transcend Information Inc.

Ver 1.7

Initiating an Ultra DMA Data-Out Burst

An Ultra DMA Data-out burst is initiated by following the steps lettered below. The timing diagram is

shown in below: Ultra DMA Data-Out Burst Initiation Timing. The timing parameters are specified in Page

12: Ultra DMA Data Burst Timing Requirements and are described in Page 13:Ultra DMA Data Burst

Timing Descriptions.

The following steps shall occur in the order they are listed unless otherwise specifically allowed:

(a) The host shall keep -DMACK in the negated state before an Ultra DMA data burst is initiated.

(b) The device shall assert DMARQ to initiate an Ultra DMA data burst.

(d) The host shall assert HSTROBE.

(e) In True IDE mode, the host shall not assert -CS0, -CS1, nor A[02:00].

(f) Steps (c), (d), and (e) shall have occurred at least tACK before the host asserts -DMACK.The host shall

keep -DMACK asserted until the end of an Ultra DMA data burst.

(g) The device may negate -DDMARDY tZIORDY after the host has asserted -DMACK. While operating in

True IDE mode, once the device has negated -DDMARDY, the device shall not release -DDMARDY

until after the host has negated DMACK at the end of an Ultra DMA data burst.

(h) The host shall negate STOP within tENV after asserting -DMACK. The host shall not assert STOP until

after the first negation of HSTROBE.

(i) The device shall assert -DDMARDY within tLI after the host has negated STOP. After asserting

DMARQ and -DDMARDY the device shall not negate either signal until after the first negation of

HSTROBE by the host.

(j) The host shall drive the first word of the data transfer onto D[15:00]. This step may occur any time

during Ultra DMA data burst initiation.

(k) To transfer the first word of data: the host shall negate HSTROBE no sooner than tUI after the device

has asserted -DDMARDY. The host shall negate HSTROBE no sooner than tDVS after the driving the

first word of data onto D[15:00].

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