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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DM9161EP датащи(PDF) 21 Page - Davicom Semiconductor, Inc. |
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DM9161EP датащи(HTML) 21 Page - Davicom Semiconductor, Inc. |
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21 / 50 page  DM9161 10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver Final 21 Version: DM9161-DS-F05 September 10, 2008 7.2.11 Power Reduced Mode The Signal detect circuit is always turned on to monitor whether there is any signal on the media. In case of cable disconnection,, DM9161 will automatically turn off the power and enter the Power Reduced mode, regardless of its operation mode being N-way auto-negotiation or forced mode. While in the Power Reduced mode, the transmit circuit will continue sending out fast link pules with minimum power consumption. If a valid signal is detected from the media, which might be N-way fast link pules, 10Base-T normal link pules, or 100Base-TX MLT3 signals, the device wakes up and resumes normal operation mode. Automatic reduced power down mode can be disabled by writing Zero to Reg.16.4. 7.2.12 Power Down Mode Power Down mode is entered by setting Reg.0.11 to ONE or pulling PWRDWN pin high, which disables all transmit and receive functions, and MII interface functions except the MDC/MDIO management interface. 7.2.13 Reduced Transmit Power Mode Additional transmit power reduction can be gained by designing with 1.25:1 turns ration magnetic on its TX side and using a 8.5KΩ resistor on BGRES and BGRESG pins, and the TX+/TX- pulled high resistors being changed from 50Ω to 78Ω. This configuration could reduce about 20% of transmit power. |
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