DM9003

2-port Switch with Processor Interface

2

Preliminary datasheet

DM9003-15-DS-P05

April 9, 2009

CONTENT

1.

GENERAL DESCRIPTION............................................................................................... 9

2.

BLOCK DIAGRAM........................................................................................................... 9

3.

FEATURES .................................................................................................................... 10

4.

PIN CONFIGURATION : 64 PIN LQFP.......................................................................... 11

5.

PIN DESCRIPTION ........................................................................................................ 12

5.1 Processor Bus interface ............................................................................................................................... 12

5.2 EEPROM Interfaces ....................................................................................................................................... 12

5.3 LED Pins ......................................................................................................................................................... 13

5.4 Clock Interface............................................................................................................................................... 13

5.5 Network Interface .......................................................................................................................................... 13

5.6 Miscellaneous Pins ....................................................................................................................................... 14

5.7 Power Pins ..................................................................................................................................................... 14

5.8 Strap pins table.............................................................................................................................................. 14

6.

CONTROL AND STATUS REGISTER SET................................................................... 15

6.1 Network Control Register (00H) ................................................................................................................... 17

6.2 Network Status Register (01H) ..................................................................................................................... 17

6.3 TX Control Register (02H)............................................................................................................................. 18

6.4 RX Control Register (05H) ............................................................................................................................ 18