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STHV748 датащи(PDF) 6 Page - STMicroelectronics |
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STHV748 датащи(HTML) 6 Page - STMicroelectronics |
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6 / 22 page ![]() Pin settings STHV748 6/22 Doc ID 15450 Rev 1 2.3 Additional pin description EN allows minimizing the power consumption. If EN=0, the self voltage reference is not supplied. Supplying reference externally the total power consumption is reduced. THSD is a thermal flag. The output stage of THSD pin is a Nch-MOS open-drain, so this necessary to connect external pull-up resistance (Rp≥10 k Ω) to positive low-voltage supply (see Figure 1).If the internal temperature overtakes 160 °C, THSD goes down and put all the channels in HZ state. Externally forcing THSD to positive low-voltage supply, the thermal protection will be disabled. D_CTR can be used to optimize 2nd HD performances by tuning the fall propagation delay (tdf - see table 9). If D_CTR is equal to ground tdf has the nominal value. If D_CTR is being varied from 2 V to 4.2 V tdf can be changed from -1ns to +600 ps respect to the nominal value. EXPOSED-PAD is internally connected to the substrate. It can be floating or connected to a 100 V capacitance toward ground in order to reduce noise during the receiving phase. Pin N Name Function IN/OUT Type 45 HVM0_D Negative high-voltage supply 0 channel D I P 46 HVM1_D Negative high-voltage supply 1 channel D I P 47 REF_HVM0 Supply for low side 0 gate driver I P 48 DGND Logic ground I A 49 DVDD Positive logic supply I A 50 IN1_D Input signal channel D I D 51 IN2_D Input signal channel D I D 52 IN3_D Input signal channel D I D 53 VDDP Positive low-voltage supply I A 54 GND_PWR Power ground I P 55 XDCR_D Channel D, high-voltage output O P 56 LVOUT_D Channel D, low-voltage output O A 57 LVOUT_A Channel A, low-voltage output O A 58 XDCR_A Channel A, high-voltage output O P 59 GND_PWR Power ground I P 60 VDDM Negative low-voltage supply I A 61 IN3_A Input signal channel A I D 62 IN2_A Input signal channel A I D 63 IN1_A Input signal channel A I D 64 EN Enable internal supply generators I D Exposed-Pad Substrate I P Table 2. Pin description (P = power, A = analog, D = digital) (continued) |
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