MPC5633MF0MMGA4 datasheet(17/118 Pages) FREESCALE

17 / 118 page

Overview

MPC5634M Microcontroller Data Sheet, Rev. 4

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

•

Software programmable block program/erase restriction control

•

Erase of selected block(s)

•

Read page size of 128 bits (four words)

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ECC with single-bit correction, double-bit detection

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Program page size of 128 bits (four words) to accelerate programming

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ECC single-bit error corrections are visible to software

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Minimum program size is two consecutive 32-bit words, aligned on a 0-modulo-8 byte address, due to ECC

•

Embedded hardware program and erase algorithm

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Erase suspend, program suspend and erase-suspended program

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Shadow information stored in non-volatile shadow block

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Independent program/erase of the shadow block

1.3.10

SRAM

The MPC5634M SRAM module provides a general-purpose up to 94 KB memory block. The SRAM controller includes these

features:

•

Supports read/write accesses mapped to the SRAM memory from any master

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32 KB or 24 KB block powered by separate supply for standby operation

•

Byte, halfword, word and doubleword addressable

•

ECC performs single-bit correction, double-bit detection on 32-bit data element

1.3.11

BAM

The BAM (Boot Assist Module) is a block of read-only memory that is programmed once by Freescale and is identical for all

MPC5634M MCUs. The BAM program is executed every time the MCU is powered-on or reset in normal mode. The BAM

supports different modes of booting. They are:

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Booting from internal flash memory

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Serial boot loading (A program is downloaded into RAM via eSCI or the FlexCAN and then executed)

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Booting from external memory on calibration bus

The BAM also reads the reset configuration half word (RCHW) from internal flash memory and configures the MPC5634M

hardware accordingly. The BAM provides the following features:

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Sets up MMU to cover all resources and mapping all physical address to logical addresses with minimum address

translation

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Sets up the MMU to allow user boot code to execute as either Classic PowerPC Book E code (default) or as Freescale

VLE code

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Detection of user boot code

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Automatic switch to serial boot mode if internal flash is blank or invalid

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Supports user programmable 64-bit password protection for serial boot mode

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Supports serial bootloading via FlexCAN bus and eSCI using Freescale protocol

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Supports serial bootloading via FlexCAN bus and eSCI with auto baud rate sensing

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Supports serial bootloading of either Classic Power Architecture Book E code (default) or Freescale VLE code

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Supports booting from calibration bus interface

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Supports censorship protection for internal flash memory

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Provides an option to enable the core watchdog timer

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Provides an option to disable the system watchdog timer

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