Pad Assignment

Chip size: 113

´ 106 (mil)

2

Bump height: 18

mm ± 3mm

Min. Bump spacing: 23.102

mm

Bump size: 76

´ 76mm

2

* The IC substrate should be connected to VDD in the PCB layout artwork.

HT1623

Rev. 1.50

3

June 17, 2009

PATENTED

1

2

3

4

5

6

7

8

9

1 0

1 1

1 2

1 3

1 4

1 5

1 6

2 0 2 1 2 2 2 3

2 4 2 5

2 6 2 7

2 8 2 9

3 0 3 1

3 2 3 3

3 4 3 5

3 6

3 7

3 8

3 9

4 0

4 1

4 2

4 3

4 4

4 5

4 6

4 7

4 8

4 9

5 0

5 1

5 2

5 3

5 4

5 5

5 6

5 7

5 8

5 9

6 0

6 1

6 2

6 3

6 4

6 5

6 6

6 7

6 8

6 9

7 0

7 1

C S

R D

W R

D A T A

V S S

O S C I

O S C O

V D D

V L C D

I R Q

B Z

B Z

T 1

T 2

T 3

C O M 0

1 7

1 8

1 9

C O M 1

C O M 2

( 0 , 0 )

S E G 1 3

S E G 1 4

S E G 1 5

S E G 1 6

S E G 1 7

S E G 1 8

S E G 1 9

S E G 2 0

S E G 2 1

S E G 2 2

S E G 2 3

S E G 2 4

S E G 2 5

S E G 2 6

S E G 2 7

S E G 2 8

S E G 2 9

S E G 3 0

S E G 3 1