HT48F06E datasheet(21/74 Pages) HOLTEK

21 / 74 page

HT48F06E/HT48F10E/HT48F30E

Rev. 1.60

July 29, 2009

ERASE

The

²ERASE² instruction is used to erase data at a

specified address. The data at the address specified will

be set to

²1². To instigate an ²ERASE² instruction, the

CS bit should be set high, followed by a high start bit and

then the instruction code

²11², all transmitted via the DI

bit. The address information should then follow with the

MSB bit being transmitted first. After all the

²ERASE² in-

struction code and address have been transmitted, the

data at the specified address will be erased when the

CS bit is cleared to zero. The EEPROM does this by ex-

ecuting an internal write cycle which will set all data at

the specified address to

²1². This process takes place

internally using the EEPROM

¢s own internal clock and

does not require any action from the SK clock. No fur-

ther instructions can be accepted by the EEPROM until

the write cycle has finished. To determine when the write

cycle has ended, the CS should be again brought high

and the DO bit polled. If the DO bit is low this indicates

that the write-cycle is still in progress, however, the DO

bit will change to a high value when the write-cycle has

ended. Before an

²ERASE² instruction is transmitted,

²EWEN² instruction must have been transmitted at

some point earlier to ensure that the erase/write function

of the EEPROM is enabled.

Internal Write Cycle

The write or erase instructions,

²WRITE², ²ERASE²,

²ERAL² or ²WRAL² will all use the EEPROM¢s internal

write cycle function. As this function is completely inter-

nally timed, the SK clock is not required. As the MCU has

no control over the timing of this write cycle, it must still

have some way of knowing when the internal write cycle

has completed. This is because, when the internal write

cycle is executing, the EEPROM will not accept any fur-

ther instructions from the MCU. The MCU must therefore

wait until the write cycle has finished before sending any

further instructions.

One way for the MCU to know when the write cycle has

terminated is to poll the DO bit after the CS bit has is-

sued a low pulse. The low going edge of this CS bit

pulse will initiate the internal write cycle, when the bit is

returned high the DO bit will go low to indicated that the

write cycle is in progress. When the DO bit returns high

this indicates that the internal write cycle has ended and

that the EEPROM is ready to receive further instruc-

tions.

C S

S K

D O

S t a n d b y

D I

t S V

t C D S

B u s y

V e r i f y

D 7

D 0

t P R

S t a r t b i t

X X X X X - - 5 - b i t d o n ' t c a r e

WRAL Timing

C S

S K

D O

D I

S t a r t b i t

S t a n d b y

t S V

t C D S

B u s y

V e r i f y

A 6

A 1

A 0

t P R

A 5

A 4

ERASE Timing

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