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73S8024RN датащи(PDF) 12 Page - Teridian Semiconductor Corporation

номер детали 73S8024RN
подробное описание детали  Low Cost Smart Card Interface
PDF  27 Pages
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производитель  TERIDIAN [Teridian Semiconductor Corporation]
домашняя страница  http://www.teridian.com
Logo TERIDIAN - Teridian Semiconductor Corporation

73S8024RN датащи(HTML) 12 Page - Teridian Semiconductor Corporation

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73S8024RN Data Sheet
DS_8024RN_020
12
Rev. 1.8
8 Deactivation Sequence
Deactivation is initiated either by the system controller by setting the
CMDVCC high, or automatically in
the event of hardware faults. Hardware faults are over-current, overheating, VDD fault, VPC fault, VCC fault,
and card extraction during the session. To be noted that VPC and VCC faults are linked together so that a
fault is generated when VPC goes lower than VCC.
The following steps show the deactivation sequence and the timing of the card control signals when the
system controller sets the
CMDVCC high or OFF goes low due to a fault or card removal:
•
RST goes low at the end of t1.
•
CLK is set low at the end of t2.
•
I/O goes low at the end of t3. Out of reception mode.
•
VCC is shut down at the end of time t4. After a delay t5 (discharge of the VCC capacitor), VCC is low.
RST
CLK
I/O
VCC
t
1
t
2
t
3
t
4
t
5
CMDVCC
-- OR--
OFF
t1 = > 0.5μs, timing by 1.5MHz internal Oscillator
t2 = > 7.5μs
t3 = > 0.5μs
t4 = > 0.5μs
t5 = depends on VCC filter capacitor.
For NDS application, CF=1μF makes t1 + t2 + t3 + t4 + t5 < 100μs
Figure 4: Deactivation Sequence



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