ISO7421 datasheet(11/19 Pages) TI

11 / 19 page

TC − Case Temperature − °C

100

120

140

160

180

200

100

150

200

VCC1, VCC2 at 3.6 V

G002

VCC1, VCC2 at 5.5 V

S0417-01

CC1

0.1 F

2 mm

max.

from

CC1

OUTA

INB

OUTPUT

INPUT

GND1

ISO7421

CC2

0.1 F

2 mm

max.

from

CC2

INA

OUTB

OUTPUT

INPUT

GND2

ISO7420, ISO7420M

ISO7421, ISO7421M

www.ti.com

SLLS984A – JUNE 2009 – REVISED DECEMBER 2009

(over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

θJB

Junction-to-board thermal resistance

°C/W

θJC

Junction-to-case thermal resistance

69.1

°C/W

VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF,

Device power dissipation

390

Input a 150-Mbps 50% duty-cycle square wave

Figure 5.

θJC Thermal Derating Curve per IEC 60747-5-2

ICC EQUATIONS

ICC1,2 = ICC1,2_quiescent + Sum of all dynamic ICC inputs on side 1,2 + sum of all dynamic ICC outputs on side 1,2

(1)

ICC_quiescent can be determined from the electrical specification tables for concerned product included in the

datasheet for the appropriate VCC.

Dynamic ICC can be calculated as follows.

At VCC = 3.6, worst case

ICC_input = 0.016 × f

(2)

ICC_output = 0.02 × f + 0.002 × f × (CL – 0.5)

(3)

At VCC = 5.5, worst case

ICC_input = 0.036 × f

(4)

ICC_output = 0.033 × f + 0.0032 × f × (CL – 0.5)

(5)

where ICC is in mA, f = data rate in Mbps, CL = capacitive load in pF.

Figure 6. Typical ISO7421 Application Circuit

Submit Documentation Feedback

Product Folder Link(s): ISO7420, ISO7420M ISO7421, ISO7421M

ISO7421 датащи(PDF) 11 Page - Texas Instruments

ISO7421 датащи(HTML) 11 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

датащи скачать

ссылки URL