LT2940CMS datasheet(14/24 Pages) LINER

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LT2940

2940f

APPLICATIONS INFORMATION

Figure 6. LATCH Pin Protective Damping

below full-scale also affords scaling ﬂexibility. Line (D)

along IPMON = 100μA covers a 4:1 range like (A), but the

maximum VI is 100mV, which reduces voltage drop and

dissipation in the sense resistor.

Variable power applications comprise power measuring,

whether battery charging, energy metering or motor

monitoring, variable load-boxes, and other circuits where

the signiﬁcant metric is not a single value, and voltage

and current may be independent of each other. Design in

this case requires mapping the LT2940’s sense ranges to

cover the maximum voltage and the maximum current,

while considering whether the power represented is at,

above, or below full-scale IPMON. For example, setting it

at full-scale puts all values in the accurate range, setting

it above puts more accuracy in nominal power levels and

less accuracy in perhaps rarely encountered high levels,

and setting below might afford ﬂexibility to lower dissipa-

tion in the current sense resistor.

Output Filtering and Integration

Lowpass ﬁltering the output power or current signal is as

simple as adding a capacitor in parallel with the output

voltage scaling resistor at PMON or IMON. For example,

adding 1nF in parallel with the PMON load resistor on the

front page application creates a lowpass corner frequency

of approximately 6.4kHz on the power monitor voltage.

Loaded by only a capacitor, the PMON pin voltage is pro-

portional to the time-integral of power, which is energy.

The integrating watt-hour meter application shown on

the back page takes advantage of this convenience. In a

similar way, a capacitor load on IMON produces a volt-

age proportional to charge that can be used to create a

coulomb counter.

Comparator Function

The LT2940’s integrated comparator features an internal

ﬁxed reference, complementary open-collector outputs

and conﬁgurable latching. A rising voltage at the CMP+

pin is compared to the internal 1.24V threshold. 35mV

(typical) negative hysteresis provides glitch protection and

makes falling inputs trip the comparator at about 1.21V.

The comparator result drives the open-collector CMPOUT

and CMPOUT pins which, when pulling down, sink at

least 3mA down to 0.4V. See the Typical Performance

Characteristics for more information. Complementary

comparator outputs save external components in some

applications. The CMPOUT and CMPOUT pins may be

pulled up externally to 36V maximum.

Comparator Latching

The LATCH pin controls the behavior of the comparator

outputs. When the LATCH pin is open, the comparator

output latch is transparent. Leakage currents up to ±10μA

will not change the decoded state of the LATCH pin. Internal

circuits weakly drive the pin to about 1.5V. Adding a 10nF

capacitor between LATCH and GND protects against high

dV/dt on adjacent pins and traces. Where more than 30V

and long inductive leads will be connected to LATCH,

damp potentially damaging ringing with a circuit like that

shown in Figure 6.

LATCH

I–

I+

2940 F06

10nF

R9A

20k

RESET

4V TO 80V

LT2940

GND

R9B

49.9k

LONG

WIRE

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