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33879 датащи(PDF) 18 Page - Freescale Semiconductor, Inc |
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33879 датащи(HTML) 18 Page - Freescale Semiconductor, Inc |
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18 / 23 page ![]() Analog Integrated Circuit Device Data 18 Freescale Semiconductor 33879 FUNCTIONAL DESCRIPTION DEVICE OPERATION declare the load open in the OFF state when the output drain- to-source voltage is less than VOUT(FLT-TH). This device has an internal 80 μA current source connected from drain to source of the output MOSFET. The current source may be programmed on or off via SPI. The Power-ON Reset state for the current source is “off” and must be enabled via SPI. To achieve low Sleep mode quiescent currents, the Open Load Detection Current source of each driver is switched off when VDD or EN is removed. During output switching, especially with capacitive loads, a false output OFF open load fault may be triggered. To prevent this false fault from being reported, an internal fault filter of 100 μs to 300 μs is incorporated. A false fault reporting is a function of the load impedance, RDS(ON), COUT of the MOSFET, as well as the supply voltage, VPWR. The rising edge of CS triggers the built-in fault delay timer. The timer will time out before the fault comparator is enabled and the fault is detected. Once the condition causing the open load fault is removed, the device will resume normal operation. The open load fault, however, will be latched in the output DO register for the MCU to read. SHORTED LOAD FAULT A shorted load (over-current) fault can be caused by any output being shorted directly to supply, or an output experiencing a current greater than the current limit. There are two safety circuits progressively in operation during load short conditions that provide system protection: 1. The device’s output current is monitored in an analog fashion using SENSEFET approach and current limited. 2. The device’s output thermal limit is sensed and when attained causes only the specific faulted output to shut down. The output will remain off until cooled. The device will then reassert the output automatically. The cycle will continue until fault is removed or the command bit instructs the output off. Shorted load faults will be reported properly through the SPI regardless of Open Load Detection Current enable bits. UNDER-VOLTAGE SHUTDOWN An under-voltage condition on VDD or VPWR will result in the shutdown of all outputs. The VDD under-voltage threshold is between 0.8 and 3.0 V. VPWR under-voltage threshold is between 3.0 and 5.0 V. When the supplies fall below their respective thresholds, all outputs are turned OFF. As both supplies returns to normal levels, internal logic is reset and the device resumes normal operation. OUTPUT VOLTAGE CLAMP Each output of the 33879 incorporates an internal voltage clamp to provide fast turn-off and transient protection of each output. Each clamp independently limits the drain-to-source voltage to 45 V for low side drive configurations and -20 V for high side drive configurations. The total energy clamped (EJ) can be calculated by multiplying the current area under the current curve (IA) times the clamp voltage (VCL) (see Figure 18). Characterization of the output clamps, using a single pulse non-repetitive method at 0.35 A, indicates the maximum energy per output to be 50 mJ at 150°C junction temperature. Figure 18. Output Voltage Clamping SPI CONFIGURATIONS The SPI configuration on the 33879 device is consistent with other devices in the Octal Serial Switch (OSS) family. This device may be used in serial SPI or parallel SPI with the 33298 and 33291. Different SPI configurations may be provided. For more information, contact Freescale Analog Products Division or the local Freescale representative. REVERSE BATTERY The 33879 has been designed with reverse battery protection on the VPWR pin. All outputs consist of a power MOSFET with an integral substrate diode. During the reverse battery condition, current will flow through the load via the substrate diode. Under this circumstance, relays may energize and lamps will turn on. Where load reverse battery protection is desired, a reverse battery blocking diode must be placed in series with the load. Current Area (IA) Clamp Energy (EJ = IA x VCL) Clamp Energy (EJ = IA x VCL) Drain Voltage Source Voltage Time Time BAT Drain-to-Source Clamp Voltage (VCL = 45 V) Drain Current (ID = 0.3 A) GND GND VS Drain-to-Source ON Voltage (VDS(ON)) Drain-to-Source ON Voltage (VDS(ON)) Current Area (IA) Source Current (IS = 0.3 A) Source Clamp Voltage (VCL = -15 V) |
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