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AT24C01B датащи(PDF) 3 Page - ATMEL Corporation |
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AT24C01B датащи(HTML) 3 Page - ATMEL Corporation |
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3 / 20 page ![]() 3 8517C–SEEPR–01/09 AT24C01B/02B/04B/08B 4. Pin Description SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open- drain driven and may be wire-ORed with any number of other open-drain or open-collector devices. DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01B/02B/04B. As many as eight 1K/2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). The AT24C04B uses the A2 and A1 inputs for hardwire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect. The AT24C08B only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins are no connect. WRITE PROTECT (WP): The AT24C01B/02B/04B/08B has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when con- nected to ground (GND). When the Write Protect pin is connected to V CC, the write protection feature is enabled and operates as shown in the following table. 5. Memory Organization AT24C01B, 1K SERIAL EEPROM: Internally organized with 16 pages of 8 bytes each, the 1K requires a 7-bit data word address for random word addressing. AT24C02B, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K requires an 8-bit data word address for random word addressing. AT24C04B, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K requires a 9-bit data word address for random word addressing. AT24C08B, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K requires a 10-bit data word address for random word addressing. Table 4-1. Write Protect WP Pin Status Part of the Array Protected AT24C01B/02B/04B/08B At VCC Full Array At GND Normal Read/Write Operations |
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