ATtiny13A-SSH datasheet(95/174 Pages) ATMEL

95 / 174 page

8126D–AVR–11/09

ATtiny13A

The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is read from

the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the result

is right adjusted.

• ADC9:0: ADC Conversion Result

These bits represent the result from the conversion, as detailed in “ADC Conversion Result” on

page 92.

14.12.4

ADCSRB – ADC Control and Status Register B

• Bits 7, 5:3 – Res: Reserved Bits

These bits are reserved bits in the ATtiny13A and will always read as zero.

• Bits 2:0 – ADTS2:0: ADC Auto Trigger Source

If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger

an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion

will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trig-

ger source that is cleared to a trigger source that is set, will generate a positive edge on the

trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running

mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set

14.12.5

DIDR0 – Digital Input Disable Register 0

• Bits 5:2 – ADC3D:ADC0D: ADC3:0 Digital Input Disable

When a bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled.

The corresponding PIN register bit will always read as zero when this bit is set. When an analog

signal is applied to the ADC7..0 pin and the digital input from this pin is not needed, this bit

should be written logic one to reduce power consumption in the digital input buffer.

Bit

6543

210

0x03

–

ACME

–

ADTS2

ADTS1

ADTS0

ADCSRB

Read/Write

R/W

Initial Value

0000

000

Table 14-5.

ADC Auto Trigger Source Selections

ADTS2

ADTS1

ADTS0

Trigger Source

Free Running mode

Analog Comparator

External Interrupt Request 0

Timer/Counter Compare Match A

Timer/Counter Overflow

Timer/Counter Compare Match B

Pin Change Interrupt Request

Bit

765

4321

0x14

–

ADC0D

ADC2D

ADC3D

ADC1D

AIN1D

AIN0D

DIDR0

Read/Write

R/W

Initial Value

000

0000

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