ATtiny43U-MU datasheet(3/182 Pages) ATMEL

3 / 182 page

8048B–AVR–03/09

capability except PA7 which has the RESET capability. To use pin PA7 as an I/O pin, instead of

RESET pin, program (‘0’) RSTDISBL fuse. As inputs, Port A pins that are externally pulled low

will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a

reset condition becomes active, even if the clock is not running.

Port A has an alternate functions as analog inputs for the ADC, analog comparator, timer/coun-

ter, SPI and pin change interrupt as described in “Alternate Port Functions” on page 67.

1.1.4

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

reset, even if the clock is not running. The minimum pulse length is given in Table 20-4 on page

158. Shorter pulses are not guaranteed to generate a reset.

1.1.5

Port B (PB7:PB0)

Port B is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port B also serves the functions of various special features as listed in Section 11.3 “Alternate

Port Functions” on page 67.

1.1.6

LSW

Boost converter external inductor connection. Connect to ground when boost converter is dis-

abled permanently.

1.1.7

BAT

Battery supply voltage. Connect to ground when boost converter is disabled permanently.

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