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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ATtiny88 датащи(PDF) 139 Page - ATMEL Corporation |
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ATtiny88 датащи(HTML) 139 Page - ATMEL Corporation |
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139 / 266 page  139 8008C–AVR–03/09 ATtiny48/88 Figure 15-12. Formats and States in the Master Transmitter Mode 15.7.2 Master Receiver Mode In the Master Receiver mode, a number of data bytes are received from a Slave Transmitter (Slave see Figure 15-13). In order to enter a Master mode, a START condition must be transmit- ted. The format of the following address packet determines whether Master Transmitter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this section assume that the prescaler bits are zero or are masked to zero. S SLA W A DATA A P $08 $18 $28 R SLA W $10 AP $20 P $30 A or A $38 A Other master continues A or A $38 Other master continues R A $68 Other master continues $78 $B0 To corresponding states in slave mode MT MR Successfull transmission to a slave receiver Next transfer started with a repeated start condition Not acknowledge received after the slave address Not acknowledge received after a data byte Arbitration lost in slave address or data byte Arbitration lost and addressed as slave DATA A n From master to slave From slave to master Any number of data bytes and their associated acknowledge bits This number (contained in TWSR) corresponds to a defined state of the 2-Wire Serial Bus. The prescaler bits are zero or masked to zero S |
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