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ATmega32U2 датащи(PDF) 90 Page - ATMEL Corporation |
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ATmega32U2 датащи(HTML) 90 Page - ATMEL Corporation |
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90 / 314 page ![]() 90 7799B–AVR–07/09 ATmega8U2/16U2/32U2 • Bits 6:1 – Res: Reserved These bits are reserved and will always read as zero. • Bit 0 – PSRSYNC: Prescaler Reset for Synchronous Timer/Counters When this bit is one, Timer/Counter0 and Timer/Counter1, Timer/Counter3, Timer/Counter4 and Timer/Counter5 prescaler will be Reset. This bit is normally cleared immediately by hardware, except if the TSM bit is set. Note that Timer/Counter0 and Timer/Counter1 share the same pres- caler and a reset of this prescaler will affect all timers. |
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