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5167E–SFLSH–5/09

AT25FS010

still in progress. If Bit 0=0, the programming cycle has ended. Only the RDSR instruction is

enabled during the programming cycle and all other opcode instructions are ignored until pro-

gramming cycle has completed.

A single PROGRAM instruction programs 1 to 256 consecutive bytes within a page if it is not

write protected. The starting byte address can be anywhere within the page. When the end of

the page is reached, the address will wrap around to the beginning of the same page. If the data

to be programmed is less than a full page, the data of all other bytes on the same page will

remain unchanged meaning that the unwritten address locations within the page will not be

changed. If more than 256 bytes of data are provided, the address counter will roll over on the

same page and the previous data provided will be replaced. The same byte cannot be repro-

grammed without erasing the whole sector or block first. The AT25FS010 will automatically

return to the write disable state at the completion of the programming cycle.

Note:

If the device is not write enabled (WREN), the device will ignore the Write instruction and will

return to the standby state when CS is brought high. A new CS falling edge is required to re-initi-

ate the serial communication.

ERASE OPERATION: The AT25FS010 memory array is internally organized into uniform

4K byte sectors or uniform 32K byte uniform blocks (see Table 4-8). Before data can be

reprogrammed, the sector or block that contains the data must be erased first. In order to

erase the AT25FS010, there are three flexible erase instructions that can be executed as

follows: SECTOR ERASE, BLOCK ERASE and CHIP ERASE instructions. A SECTOR

ERASE instruction allows erasing any individual 4K sector without changing data in rest

of memory. The BLOCK ERASE instruction allows erasing any individual block and CHIP

ERASE allows erasing the entire memory array.

SECTOR ERASE (SECTOR ERASE): The SECTOR ERASE instruction sets all 4K bytes in the

selected sector to logic 1 or erased state. In order to sector erase the AT25FS010, two separate

instructions must be executed. First, the device must be write enabled via the WREN instruction.

Then the SECTOR ERASE instruction can be executed and will erase every byte in the selected

sector if the sector is not locked out. The sector address is automatically determined if any

address within the sector is selected (see Figure 5-10). The SECTOR ERASE instruction is

internally controlled and self timed to completion. During this time, all commands will be ignored

except RDSR instruction. The progress or completion of the erase operation can be determined

by reading ready/busy bit (bit 0) through RDSR instruction. If Bit 0=1, sector erase cycle is in

progress. If Bit 0=0, the erase operation has been completed. The AT25FS010 will automatically

return to the write disable state at the completion of the SECTOR ERASE cycle.

Table 4-7.

Address Key

Address

AT25FS010

Don’t Care Bits