AT89LP213_09 datasheet(13/98 Pages) ATMEL

13 / 98 page

3538D–MICRO–10/09

AT89LP213/214

9.2

External Clock Source

The external clock option disables the oscillator amplifier and allows XTAL1 to be driven directly

by the clock source as shown in Figure 9-2. XTAL2 may be left unconnected, used as P3.3 I/O,

or configured to output a divided version of the system clock.

Figure 9-2.

External Clock Drive Configuration

9.3

Internal RC Oscillator

The AT89LP213/214 has an internal RC oscillator tuned to 8.0 MHz ±1.0% at 5.0V and 25

° C.

When enabled as the clock source, XTAL1 and XTAL2 may be used as P3.2 and P3.3 respec-

tively. XTAL2 may also be configured to output a divided version of the system clock. The

frequency of the oscillator may be adjusted by changing the RC Adjust Fuses. (See “User Con-

figuration Fuses” on page 72). A copy of the initial factory setting is stored at location 0007h of

the Atmel SIgnature.

9.4

System Clock Out

When the AT89LP213/214 is configured to use either an external clock or the internal RC oscil-

lator, a divided version of the system clock may be output on XTAL2 (P3.3). The Clock Out

feature is enabled by setting the COE bit in CLKREG. The two CDV bits determine the clock

divide ratio. For example, setting COE = “1” and CDIV = “00” when using the internal oscillator

will result in a 4.0 MHz clock output on P3.3. P3.3 must be configured as an output in order to

use the clock out feature.

XTAL2 (P3.3)

XTAL1 (P3.2)

GND

NC, GPIO, or

CLKOUT

EXTERNAL

OSCILLATOR

SIGNAL

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