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ATmega162 датащи(PDF) 107 Page - ATMEL Corporation |
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ATmega162 датащи(HTML) 107 Page - ATMEL Corporation |
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107 / 324 page ![]() 107 2513K–AVR–07/09 ATmega162/V Figure 46. 16-bit Timer/Counter Block Diagram (1) Note: 1. Refer to Figure 1 on page 2, Table 32 on page 72, and Table 38 on page 78 for Timer/Counter1 pin placement and description. Registers The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B), and Input Capture Regis- ter (ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16- bit registers. These procedures are described in the section “Accessing 16-bit Registers” on page 109. The Timer/Counter Control Registers (TCCRnA/B) are 8-bit registers and have no CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag Register (TIFR) and Extended Timer Interrupt Flag Register (ETIFR). All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK) and Extended Timer Interrupt Mask Register (ETIMSK). (E)TIFR and (E)TIMSK are not shown in the figure since these registers are shared by other Timer units. The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on the T1 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source is selected. The output from the Clock Select logic is referred to as the Timer Clock (clk Tn). The double buffered Output Compare Registers (OCRnA/B) are compared with the Timer/Coun- ter value at all time. The result of the compare can be used by the waveform generator to generate a PWM or variable frequency output on the Output Compare pin (OCnA/B). See “Out- put Compare Units” on page 114. The Compare Match event will also set the Compare Match Flag (OCFnA/B) which can be used to generate an output compare interrupt request. Clock Select Timer/Counter OCRnA OCRnB ICRn = = TCNTn Waveform Generation Waveform Generation OCnA OCnB Noise Canceler ICPn = Fixed TOP Values Edge Detector Control Logic = 0 TOP BOTTOM Count Clear Direction TOVn (Int.Req.) OCnA (Int.Req.) OCnB (Int.Req.) ICFn (Int.Req.) TCCRnA TCCRnB ( From Analog Comparator Ouput ) Tn Edge Detector ( From Prescaler ) clk Tn |
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