ATmega16 datasheet(230/357 Pages) ATMEL

230 / 357 page

230

2466S–AVR–05/09

ATmega16(L)

Figure 115. Reset Register

Boundary-scan Chain

The Boundary-scan Chain has the capability of driving and observing the logic levels on the dig-

ital I/O pins, as well as the boundary between digital and analog logic for analog circuitry having

Off-chip connections.

See “Boundary-scan Chain” on page 232 for a complete description.

Boundary-scan

Specific JTAG

Instructions

The instruction register is 4-bit wide, supporting up to 16 instructions. Listed below are the JTAG

instructions useful for Boundary-scan operation. Note that the optional HIGHZ instruction is not

implemented, but all outputs with tri-state capability can be set in high-impedant state by using

the AVR_RESET instruction, since the initial state for all port pins is tri-state.

As a definition in this datasheet, the LSB is shifted in and out first for all Shift Registers.

The OPCODE for each instruction is shown behind the instruction name in hex format. The text

describes which Data Register is selected as path between TDI and TDO for each instruction.

EXTEST; $0

Mandatory JTAG instruction for selecting the Boundary-scan Chain as Data Register for testing

circuitry external to the AVR package. For port-pins, Pull-up Disable, Output Control, Output

Data, and Input Data are all accessible in the scan chain. For Analog circuits having Off-chip

connections, the interface between the analog and the digital logic is in the scan chain. The con-

tents of the latched outputs of the Boundary-scan chain is driven out as soon as the JTAG IR-

The active states are:

•

Capture-DR: Data on the external pins are sampled into the Boundary-scan Chain.

•

Shift-DR: The Internal Scan Chain is shifted by the TCK input.

•

Update-DR: Data from the scan chain is applied to output pins.

IDCODE; $1

Optional JTAG instruction selecting the 32-bit ID-register as Data Register. The ID-register con-

sists of a version number, a device number and the manufacturer code chosen by JEDEC. This

is the default instruction after power-up.

The active states are:

•

Capture-DR: Data in the IDCODE-register is sampled into the Boundary-scan Chain.

•

Shift-DR: The IDCODE scan chain is shifted by the TCK input.

SAMPLE_PRELOAD;

Mandatory JTAG instruction for pre-loading the output latches and talking a snap-shot of the

input/output pins without affecting the system operation. However, the output latches are not

connected to the pins. The Boundary-scan Chain is selected as Data Register.

From

TDI

ClockDR · AVR_RESET

TDO

From other Internal and

External Reset Sources

Internal Reset

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