ATmega16 datasheet(153/357 Pages) ATMEL

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2466S–AVR–05/09

ATmega16(L)

The Transmit Complete (TXC) Flag bit is set one when the entire frame in the transmit Shift

The TXC Flag bit is automatically cleared when a transmit complete interrupt is executed, or it

can be cleared by writing a one to its bit location. The TXC Flag is useful in half-duplex

communication interfaces (like the RS485 standard), where a transmitting application must enter

receive mode and free the communication bus immediately after completing the transmission.

When the Transmit Compete Interrupt Enable (TXCIE) bit in UCSRB is set, the USART Transmit

Complete Interrupt will be executed when the TXC Flag becomes set (provided that global inter-

rupts are enabled). When the transmit complete interrupt is used, the interrupt handling routine

does not have to clear the TXC Flag, this is done automatically when the interrupt is executed.

Parity Generator

The parity generator calculates the parity bit for the serial frame data. When parity bit is enabled

(UPM1 = 1), the transmitter control logic inserts the parity bit between the last data bit and the

first stop bit of the frame that is sent.

Disabling the

Transmitter

The disabling of the transmitter (setting the TXEN to zero) will not become effective until ongoing

and pending transmissions are completed, i.e., when the transmit Shift Register and transmit

Buffer Register do not contain data to be transmitted. When disabled, the transmitter will no lon-

ger override the TxD pin.

ATmega16 датащи(PDF) 153 Page - ATMEL Corporation